Thomas Gleixner 2cadf5248b x86/extable: Provide EX_TYPE_DEFAULT_MCE_SAFE and EX_TYPE_FAULT_MCE_SAFE ... Provide exception fixup types which can be used to identify fixups which allow in kernel #MC recovery and make them invoke the existing handlers. These will be used at places where #MC recovery is handled correctly by the caller. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20210908132525.269689153@linutronix.de		2021-09-13 17:56:56 +02:00
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mce	x86/extable: Provide EX_TYPE_DEFAULT_MCE_SAFE and EX_TYPE_FAULT_MCE_SAFE	2021-09-13 17:56:56 +02:00
microcode	x86/microcode: Replace deprecated CPU-hotplug functions.	2021-08-10 14:46:27 +02:00
mtrr	x86/mtrr: Replace deprecated CPU-hotplug functions.	2021-08-10 14:46:27 +02:00
resctrl	- A first round of changes towards splitting the arch-specific bits from	2021-08-30 13:31:36 -07:00
sgx	Merge branch 'akpm' (patches from Andrew)	2021-06-29 17:29:11 -07:00
.gitignore	.gitignore: add SPDX License Identifier	2020-03-25 11:50:48 +01:00
acrn.c	x86/acrn: Introduce acrn_cpuid_base() and hypervisor feature bits	2021-02-09 10:58:18 +01:00
amd.c	x86/cpu: Add get_llc_id() helper function	2021-08-26 09:14:36 +02:00
aperfmperf.c	x86/cpu: Avoid cpuinfo-induced IPIing of idle CPUs	2020-11-06 16:59:11 -08:00
bugs.c	x86, prctl: Hook L1D flushing in via prctl	2021-07-28 11:42:25 +02:00
cacheinfo.c	drivers: base: cacheinfo: Get rid of DEFINE_SMP_CALL_CACHE_FUNCTION()	2021-09-01 10:29:10 +02:00
centaur.c	x86/cpu/centaur: Add Centaur family >=7 CPUs initialization support	2020-09-11 10:53:19 +02:00
common.c	x86/cpu: Add get_llc_id() helper function	2021-08-26 09:14:36 +02:00
cpu.h	x86/tsx: Clear CPUID bits when TSX always force aborts	2021-06-15 17:46:48 +02:00
cpuid-deps.c	x86/cpufeatures: Add SGX1 and SGX2 sub-features	2021-03-25 17:33:11 +01:00
cyrix.c	x86: Fix various typos in comments	2021-03-18 15:31:53 +01:00
feat_ctl.c	x86/cpu/intel: Allow SGX virtualization without Launch Control support	2021-04-06 09:43:41 +02:00
hygon.c	perf/x86/rapl: Use CPUID bit on AMD and Hygon parts	2021-06-01 21:10:33 +02:00
hypervisor.c
intel_epb.c
intel_pconfig.c
intel.c	Changes in this cycle were:	2021-06-28 13:30:02 -07:00
Makefile	x86/sgx: Initialize metadata for Enclave Page Cache (EPC) sections	2020-11-17 14:36:13 +01:00
match.c	x86/cpu: Add a steppings field to struct x86_cpu_id	2020-04-20 12:19:21 +02:00
mkcapflags.sh
mshyperv.c	hyperv-next for 5.15	2021-09-01 18:25:20 -07:00
perfctr-watchdog.c	x86/nmi_watchdog: Fix old-style NMI watchdog regression on old Intel CPUs	2021-06-10 10:04:40 +02:00
powerflags.c
proc.c
rdrand.c
scattered.c	x86/cpufeatures: Add SGX1 and SGX2 sub-features	2021-03-25 17:33:11 +01:00
topology.c	x86: Fix various typos in comments	2021-03-18 15:31:53 +01:00
transmeta.c
tsx.c	x86/tsx: Clear CPUID bits when TSX always force aborts	2021-06-15 17:46:48 +02:00
umc.c
umwait.c	KVM: VMX: Stop context switching MSR_IA32_UMWAIT_CONTROL	2020-06-22 20:54:57 -04:00
vmware.c	Have vmware guests skip the refined TSC calibration when the TSC	2021-04-26 09:13:43 -07:00
zhaoxin.c	x86/cpu: Reinitialize IA32_FEAT_CTL MSR on BSP during wakeup	2020-06-15 14:18:37 +02:00