086df54e20
XeHP SDV is a Intel® dGPU without display. This is just the definition of some basic platform macros, by large a copy of current state of Tigerlake which does not reflect the end state of this platform. v2: - Switch to intel_step infrastructure for stepping matches. (Jani) v3: - Bring earlier in patch series and leave addition of new media engines to the engine mask for a later patch. Bspec: 44467, 48077 Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Stuart Summers <stuart.summers@intel.com> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210721223043.834562-3-matthew.d.roper@intel.com
46 lines
683 B
C
46 lines
683 B
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2020,2021 Intel Corporation
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*/
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#ifndef __INTEL_STEP_H__
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#define __INTEL_STEP_H__
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#include <linux/types.h>
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struct drm_i915_private;
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struct intel_step_info {
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u8 gt_step;
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u8 display_step;
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};
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/*
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* Symbolic steppings that do not match the hardware. These are valid both as gt
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* and display steppings as symbolic names.
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*/
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enum intel_step {
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STEP_NONE = 0,
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STEP_A0,
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STEP_A1,
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STEP_A2,
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STEP_B0,
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STEP_B1,
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STEP_C0,
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STEP_D0,
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STEP_D1,
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STEP_E0,
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STEP_F0,
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STEP_G0,
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STEP_H0,
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STEP_I0,
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STEP_I1,
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STEP_J0,
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STEP_FUTURE,
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STEP_FOREVER,
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};
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void intel_step_init(struct drm_i915_private *i915);
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#endif /* __INTEL_STEP_H__ */
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