Ajay Kumar 2f85f97e46 video: exynos_dp: Fix incorrect setting for INT_CTL ... INT_CTL register contains bits INT_POL0 and INT_POL1, and not INT_POL. This patch fixes the wrong register setting for INT_CTL. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Jingoo Han <jg1.han@samsung.com>		2012-11-29 10:33:28 +09:00
..
exynos_dp_core.c	video: exynos_dp: Reset and initialize DP before requesting irq	2012-11-29 10:33:28 +09:00
exynos_dp_core.h	video: exynos_dp: Enable hotplug interrupts	2012-11-29 10:33:28 +09:00
exynos_dp_reg.c	video: exynos_dp: Fix incorrect setting for INT_CTL	2012-11-29 10:33:28 +09:00
exynos_dp_reg.h	video: exynos_dp: Fix incorrect setting for INT_CTL	2012-11-29 10:33:28 +09:00
exynos_mipi_dsi_common.c	video: exynos_mipi_dsi: Remove unnecessary NULL check	2012-09-22 21:44:37 +00:00
exynos_mipi_dsi_common.h
exynos_mipi_dsi_lowlevel.c
exynos_mipi_dsi_lowlevel.h
exynos_mipi_dsi_regs.h
exynos_mipi_dsi.c	fbdev updates for 3.7	2012-10-12 10:21:02 +09:00
Kconfig	video: support DP controller driver	2012-02-13 03:02:30 +00:00
Makefile	video: support DP controller driver	2012-02-13 03:02:30 +00:00
s6e8ax0.c	video: exynos mipi dsi: support reverse panel type	2012-05-13 13:08:23 +00:00