Sean Wang 2fc0a509e4 clk: mediatek: add clock support for MT7622 SoC
Add all supported clocks exported from every susbystem found on MT7622 SoC
such as topckgen, apmixedsys, infracfg, pericfg , pciessys, ssusbsys,
ethsys and audsys.

Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-11-02 01:10:12 -07:00
..
2017-09-12 20:03:53 -07:00
2017-09-10 20:40:00 -07:00
2017-09-07 14:03:05 -07:00
2017-09-07 14:03:05 -07:00
2017-09-07 13:51:13 -07:00
2017-09-15 17:52:52 -07:00
2017-09-07 12:53:14 -07:00
2017-09-14 17:34:43 +02:00
2017-09-07 13:51:13 -07:00
2017-09-09 15:03:24 -07:00
2017-09-05 11:08:17 -07:00
2017-09-10 20:40:00 -07:00
2017-09-12 13:30:06 -07:00
2017-09-05 11:08:17 -07:00
2017-09-11 13:04:32 -07:00
2017-09-07 13:51:13 -07:00
2017-09-09 14:34:38 -07:00
2017-09-13 10:56:00 -07:00
2017-09-13 10:47:14 -07:00
2017-09-05 12:45:03 -07:00
2017-09-05 12:45:03 -07:00
2017-08-30 14:03:42 -06:00
2017-09-14 13:33:33 -07:00
2017-09-07 21:11:05 -07:00