linux

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Andi Kleen 2fe1bc1f50 perf/x86: Enable free running PEBS for REGS_USER/INTR

[ Note, this is a Git cherry-pick of the following commit:

    a47ba4d77e12 ("perf/x86: Enable free running PEBS for REGS_USER/INTR")

  ... for easier x86 PTI code testing and back-porting. ]

Currently free running PEBS is disabled when user or interrupt
registers are requested. Most of the registers are actually
available in the PEBS record and can be supported.

So we just need to check for the supported registers and then
allow it: it is all except for the segment register.

For user registers this only works when the counter is limited
to ring 3 only, so this also needs to be checked.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20170831214630.21892-1-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>

2017-12-17 13:55:17 +01:00

bts.c

perf/x86/intel/bts: Fix exclusive event reference leak

2017-10-24 13:19:27 +02:00

core.c

perf/x86: Enable free running PEBS for REGS_USER/INTR

2017-12-17 13:55:17 +01:00

cstate.c

perf/x86/intel/cstate: Add missing CPU IDs

2017-09-25 09:36:17 +02:00

ds.c

License cleanup: add SPDX GPL-2.0 license identifier to files with no license