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linux/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml
Johan Hovold e8e58e29a0 dt-bindings: phy: qcom,qmp-usb: fix sc8280xp binding 
The current QMP USB PHY bindings are based on the original MSM8996 PCIe
PHY binding which provided multiple PHYs per IP block and these in turn
were described by child nodes.

The QMP USB PHY block only provide a single PHY and the remnant child
node does not really reflect the hardware.

The original MSM8996 binding also ended up describing the individual
register blocks as belonging to either the wrapper node or the PHY child
nodes.

This is an unnecessary level of detail which has lead to problems when
later IP blocks using different register layouts have been forced to fit
the original mould rather than updating the binding. The bindings are
arguable also incomplete as they only the describe register blocks used
by the current Linux drivers (e.g. does not include the per lane PCS
registers).

Note that PCS_USB region is also not described by the current bindings
despite being used by the driver and this has led to people increasing
the size of the PCS region in the devicetree so that it includes PCS_USB
registers even though other regions like TX and RX may lie in between.

Add a new binding for the QMP USB PHYs found on SC8280XP which further
bindings can be based on.

Note that this also fixes the SC8280XP "phy_phy" reset name.

Also note that the current binding is simply removed instead of being
deprecated as it was only recently merged and support for SC8280XP is
still under development. And, specifically, there is no support in
mainline for the multiport controller that uses these PHYs.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221028160435.26948-12-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-11-05 12:59:42 +05:30

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-usb3-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm QMP PHY controller (USB, MSM8996)
maintainers:
- Vinod Koul <vkoul@kernel.org>
description:
QMP PHY controller supports physical layer functionality for a number of
controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see
qcom,sc8280xp-qmp-usb3-uni-phy.yaml.
properties:
compatible:
enum:
- qcom,ipq6018-qmp-usb3-phy
- qcom,ipq8074-qmp-usb3-phy
- qcom,msm8996-qmp-usb3-phy
- qcom,msm8998-qmp-usb3-phy
- qcom,qcm2290-qmp-usb3-phy
- qcom,sc7180-qmp-usb3-phy
- qcom,sc8180x-qmp-usb3-phy
- qcom,sdm845-qmp-usb3-phy
- qcom,sdm845-qmp-usb3-uni-phy
- qcom,sdx55-qmp-usb3-uni-phy
- qcom,sdx65-qmp-usb3-uni-phy
- qcom,sm8150-qmp-usb3-phy
- qcom,sm8150-qmp-usb3-uni-phy
- qcom,sm8250-qmp-usb3-phy
- qcom,sm8250-qmp-usb3-uni-phy
- qcom,sm8350-qmp-usb3-phy
- qcom,sm8350-qmp-usb3-uni-phy
- qcom,sm8450-qmp-usb3-phy
reg:
minItems: 1
items:
- description: serdes
- description: DP_COM
"#address-cells":
enum: [ 1, 2 ]
"#size-cells":
enum: [ 1, 2 ]
ranges: true
clocks:
minItems: 3
maxItems: 4
clock-names:
minItems: 3
maxItems: 4
power-domains:
maxItems: 1
resets:
maxItems: 2
reset-names:
maxItems: 2
vdda-phy-supply: true
vdda-pll-supply: true
vddp-ref-clk-supply: true
patternProperties:
"^phy@[0-9a-f]+$":
type: object
description: single PHY-provider child node
properties:
reg:
minItems: 3
maxItems: 6
clocks:
items:
- description: PIPE clock
clock-names:
deprecated: true
items:
- const: pipe0
"#clock-cells":
const: 0
clock-output-names:
maxItems: 1
"#phy-cells":
const: 0
required:
- reg
- clocks
- "#clock-cells"
- clock-output-names
- "#phy-cells"
additionalProperties: false
required:
- compatible
- reg
- "#address-cells"
- "#size-cells"
- ranges
- clocks
- clock-names
- resets
- reset-names
- vdda-phy-supply
- vdda-pll-supply
additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
enum:
- qcom,sc7180-qmp-usb3-phy
then:
properties:
clocks:
maxItems: 4
clock-names:
items:
- const: aux
- const: cfg_ahb
- const: ref
- const: com_aux
resets:
maxItems: 1
reset-names:
items:
- const: phy
- if:
properties:
compatible:
contains:
enum:
- qcom,sdm845-qmp-usb3-uni-phy
then:
properties:
clocks:
maxItems: 4
clock-names:
items:
- const: aux
- const: cfg_ahb
- const: ref
- const: com_aux
resets:
maxItems: 2
reset-names:
items:
- const: phy
- const: common
- if:
properties:
compatible:
contains:
enum:
- qcom,ipq8074-qmp-usb3-phy
- qcom,msm8996-qmp-usb3-phy
- qcom,msm8998-qmp-usb3-phy
- qcom,sdx55-qmp-usb3-uni-phy
- qcom,sdx65-qmp-usb3-uni-phy
then:
properties:
clocks:
maxItems: 3
clock-names:
items:
- const: aux
- const: cfg_ahb
- const: ref
resets:
maxItems: 2
reset-names:
items:
- const: phy
- const: common
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8150-qmp-usb3-phy
- qcom,sm8150-qmp-usb3-uni-phy
- qcom,sm8250-qmp-usb3-uni-phy
- qcom,sm8350-qmp-usb3-uni-phy
then:
properties:
clocks:
maxItems: 4
clock-names:
items:
- const: aux
- const: ref_clk_src
- const: ref
- const: com_aux
resets:
maxItems: 2
reset-names:
items:
- const: phy
- const: common
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8250-qmp-usb3-phy
- qcom,sm8350-qmp-usb3-phy
then:
properties:
clocks:
maxItems: 3
clock-names:
items:
- const: aux
- const: ref_clk_src
- const: com_aux
resets:
maxItems: 2
reset-names:
items:
- const: phy
- const: common
- if:
properties:
compatible:
contains:
enum:
- qcom,qcm2290-qmp-usb3-phy
then:
properties:
clocks:
maxItems: 3
clock-names:
items:
- const: cfg_ahb
- const: ref
- const: com_aux
resets:
maxItems: 2
reset-names:
items:
- const: phy_phy
- const: phy
- if:
properties:
compatible:
contains:
enum:
- qcom,sdm845-qmp-usb3-phy
- qcom,sm8150-qmp-usb3-phy
- qcom,sm8350-qmp-usb3-phy
- qcom,sm8450-qmp-usb3-phy
then:
patternProperties:
"^phy@[0-9a-f]+$":
properties:
reg:
items:
- description: TX lane 1
- description: RX lane 1
- description: PCS
- description: TX lane 2
- description: RX lane 2
- description: PCS_MISC
- if:
properties:
compatible:
contains:
enum:
- qcom,msm8998-qmp-usb3-phy
then:
patternProperties:
"^phy@[0-9a-f]+$":
properties:
reg:
items:
- description: TX lane 1
- description: RX lane 1
- description: PCS
- description: TX lane 2
- description: RX lane 2
- if:
properties:
compatible:
contains:
enum:
- qcom,ipq6018-qmp-usb3-phy
- qcom,ipq8074-qmp-usb3-phy
- qcom,qcm2290-qmp-usb3-phy
- qcom,sc7180-qmp-usb3-phy
- qcom,sc8180x-qmp-usb3-phy
- qcom,sdx55-qmp-usb3-uni-phy
- qcom,sdx65-qmp-usb3-uni-phy
- qcom,sm8150-qmp-usb3-uni-phy
- qcom,sm8250-qmp-usb3-phy
then:
patternProperties:
"^phy@[0-9a-f]+$":
properties:
reg:
items:
- description: TX
- description: RX
- description: PCS
- description: PCS_MISC
- if:
properties:
compatible:
contains:
enum:
- qcom,msm8996-qmp-usb3-phy
- qcom,sm8250-qmp-usb3-uni-phy
- qcom,sm8350-qmp-usb3-uni-phy
then:
patternProperties:
"^phy@[0-9a-f]+$":
properties:
reg:
items:
- description: TX
- description: RX
- description: PCS
examples:
- |
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
usb_2_qmpphy: phy-wrapper@88eb000 {
compatible = "qcom,sdm845-qmp-usb3-uni-phy";
reg = <0x088eb000 0x18c>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x088eb000 0x2000>;
clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK >,
<&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
<&gcc GCC_USB3_SEC_CLKREF_CLK>,
<&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
clock-names = "aux", "cfg_ahb", "ref", "com_aux";
resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
<&gcc GCC_USB3_PHY_SEC_BCR>;
reset-names = "phy", "common";
vdda-phy-supply = <&vdda_usb2_ss_1p2>;
vdda-pll-supply = <&vdda_usb2_ss_core>;
usb_2_ssphy: phy@200 {
reg = <0x200 0x128>,
<0x400 0x1fc>,
<0x800 0x218>,
<0x600 0x70>;
clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
#clock-cells = <0>;
clock-output-names = "usb3_uni_phy_pipe_clk_src";
#phy-cells = <0>;
};
};
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