Chris Metcalf a718e10cba tile: handle super huge pages in virt_to_pte ... This tile-specific API had a minor bug, in that if a super huge (>4GB) page mapped a particular address range, we wouldn't handle it correctly. As part of fixing that bug, I also cleaned up some of the pud and pmd accessors to make them more consistent. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>		2013-08-30 11:57:02 -04:00
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arch	tile PCI RC: support more MSI-X interrupt vectors	2013-08-06 12:55:24 -04:00
asm	tile: handle super huge pages in virt_to_pte	2013-08-30 11:57:02 -04:00
gxio	tile PCI RC: support more MSI-X interrupt vectors	2013-08-06 12:55:24 -04:00
hv	tile: improve big-endian support	2013-08-13 16:26:05 -04:00
uapi	tile: support kprobes on tilegx	2013-08-30 11:55:53 -04:00