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linux/drivers/dma/ti
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Pratyush Yadav 5e70a09c54 dmaengine: ti: k3-psil-j721e: Add entry for CSI2RX 
The CSI2RX subsystem on J721E is serviced by UDMA via PSI-L to transfer
frames to memory. It can have up to 32 threads per instance. J721E has
two instances of the subsystem, so there are 64 threads total. Add them
to the endpoint map.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Acked-by: Peter Ujfalusi <peter.ujflausi@gmail.com>

Link: https://lore.kernel.org/r/20210819110106.31409-1-p.yadav@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-29 19:14:19 +05:30
..
cppi41.c
dmaengine: cppi41: Fix cppi41_dma_prep_slave_sg() when idle
2019-10-23 21:15:21 +05:30
dma-crossbar.c
dmaengine: ti: drop of_match_ptr and mark of_device_id table as maybe unused
2020-11-24 23:02:20 +05:30
edma.c
dmaengine: Replace zero-length array with flexible-array
2020-06-15 23:08:30 -05:00
k3-psil-am64.c
dmaengine: ti: k3-psil: Add initial map for AM64
2020-12-11 21:20:09 +05:30
k3-psil-am654.c
dmaengine: ti: k3-psil: make symbols static
2020-01-21 13:10:24 +05:30
k3-psil-j721e.c
dmaengine: ti: k3-psil-j721e: Add entry for CSI2RX
2021-08-29 19:14:19 +05:30
k3-psil-j7200.c
dmaengine: ti: k3-psil: add map for j7200
2020-08-17 10:50:31 +05:30
k3-psil-priv.h
dmaengine: ti: k3-psil: Add initial map for AM64
2020-12-11 21:20:09 +05:30
k3-psil.c
dmaengine: ti: k3-psil: Add initial map for AM64
2020-12-11 21:20:09 +05:30
k3-udma-glue.c
dmaengine: ti: k3-udma-glue: Add support for K3 PKTDMA
2020-12-11 21:20:10 +05:30
k3-udma-private.c
dmaengine updates for v5.11-rc1
2020-12-17 12:52:23 -08:00
k3-udma.c
dmaengine: ti: k3-udma: Fix fall-through warning for Clang
2021-07-13 14:48:28 -05:00
k3-udma.h
dmaengine: ti: k3-udma-glue: Add support for K3 PKTDMA
2020-12-11 21:20:10 +05:30
Kconfig
dmaengine: ti: k3-udma: Drop COMPILE_TEST for the drivers for now
2020-04-15 21:25:25 +05:30
Makefile
dmaengine: ti: k3-psil: Add initial map for AM64
2020-12-11 21:20:09 +05:30
omap-dma.c
dmaengine: ti: omap-dma: Skip pointless cpu_pm context restore on errors
2021-05-31 10:01:53 +05:30