31ef091770
* Add meson8b DDR clock controller * Add input clocks to meson8b controllers * Fix meson8b mali clock update using the glitch free mux * Fix pll driver division by zero init -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE9OFZrhjz9W1fG7cb5vwPHDfy2oUFAl4Ynz8ACgkQ5vwPHDfy 2oVDvA/+PUQpHkHGdGrtcUPyr0fIdN40QTCCaxLLTN9MJ9RAn5KfoPWx6E8Txjps RhBu7L61J1eOVwQywzPdd82+1o2O/75H2gx6iIi0dUc+0cAlsskJlifMHRxyLeqo cByv6g5AtaVgxUCyZVqtYljNMUHUGh5FagFvpwNgIihI/3kxqwvuO00wCgH/vZoK lOHwjEvdYXqFpwSlcDd5CN3BthUnusR+lp83DhFdf2JnpvBkJJYdmK6YPCRYeFJc RCxeongMeIgyTgxLU8TBDl+jWsOGl9vgmj+HJ2D/+XLoc+gE072PvMw5feR+NZwr lwbW56y8Wm9ibvXVzXazETOJLORoWJ3Isy7C2NQ6olorqbEvdHctpqC2Idp7Vaib A1fpyWxs/9PPi1MPSvudj1ro54fEs31frI+/vRwQwwIJ0b8ZsP2BFG1QP2NgYSEA qxRUpz8AQHI16HtWNa+RTDY6Sv2MxI5S5UZLRCSQtJbvnNW3XAwwRlEWcrvjETr7 /7R6+Tu73OmdJr9A19+cxxGMwFdIt01ZWmKEhslQxf8jod95eHSUEv7+gobMlqga dIVaO+h8Vf4S4Vq1s7OUADITWfOoEFWUFFlSXaey0RTO0QteN4YVvn9ffuMTg0VI WVg6msr5tfqmX+39TmHhsmEIY+NgBT7688ugxXcbnJx6eIe5Ftc= =kcfQ -----END PGP SIGNATURE----- Merge tag 'clk-meson-v5.6-1' of https://github.com/BayLibre/clk-meson into clk-amlogic Pull Amlogic clk driver updates from Jerome Brunet: - Add meson8b DDR clock controller - Add input clocks to meson8b controllers - Fix meson8b mali clock update using the glitch free mux - Fix pll driver division by zero init * tag 'clk-meson-v5.6-1' of https://github.com/BayLibre/clk-meson: clk: clarify that clk_set_rate() does updates from top to bottom clk: meson: meson8b: make the CCF use the glitch-free mali mux clk: meson: pll: Fix by 0 division in __pll_params_to_rate() clk: meson: g12a: fix missing uart2 in regmap table clk: meson: meson8b: use of_clk_hw_register to register the clocks clk: meson: meson8b: don't register the XTAL clock when provided via OF clk: meson: meson8b: change references to the XTAL clock to use [fw_]name clk: meson: meson8b: use clk_hw_set_parent in the CPU clock notifier clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller dt-bindings: clock: meson8b: add the clock inputs dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding
Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the Restructured Text markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.