321f7ab0d4
The switch ASIC has a limited capacity of physical ('flavour physical' in devlink terminology) ports that it can support. While each system is brought up with a different number of ports, this number can be increased via splitting up to the ASIC's limit. Expose physical ports as a devlink resource so that user space will have visibility to the maximum number of ports that can be supported and the current occupancy. In addition, add a "Generic Resources" section in devlink-resource documentation so the different drivers will be aligned by the same resource name when exposing to user space. Signed-off-by: Danielle Ratson <danieller@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> |
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.. | ||
bnxt.rst | ||
devlink-dpipe.rst | ||
devlink-flash.rst | ||
devlink-health.rst | ||
devlink-info.rst | ||
devlink-params.rst | ||
devlink-region.rst | ||
devlink-reload.rst | ||
devlink-resource.rst | ||
devlink-trap.rst | ||
ice.rst | ||
index.rst | ||
ionic.rst | ||
mlx4.rst | ||
mlx5.rst | ||
mlxsw.rst | ||
mv88e6xxx.rst | ||
netdevsim.rst | ||
nfp.rst | ||
qed.rst | ||
sja1105.rst | ||
ti-cpsw-switch.rst |