Ravi Bangoria 326ecc15c6 perf/x86/ibs: Add new IBS register bits into header ... IBS support has been enhanced with two new features in upcoming uarch: 1. DataSrc extension and 2. L3 miss filtering. Additional set of bits has been introduced in IBS registers to use these features. Define these new bits into arch/x86/ header. [ bp: Massage commit message. ] Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Ian Rogers <irogers@google.com> Link: https://lore.kernel.org/r/20220604044519.594-7-ravi.bangoria@amd.com		2022-07-27 13:54:38 +02:00
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asm	perf/x86/ibs: Add new IBS register bits into header	2022-07-27 13:54:38 +02:00
uapi/asm	S390:	2022-05-26 14:20:14 -07:00