93a3d05f9d
HW/FW support two types of latency enhancement features. Until now user-space implemented only edpm (enhanced dpm). We add kernel capability flags to differentiate between current FW in kernel that supports both ldpm and edpm. Since edpm is not yet supported for iWARP we add different flags for iWARP + RoCE. We also fix bad practice of defining sizes in rdma-core and pass initialization to kernel, for forward compatibility. The capability flags are added for backward-forward compatibility between kernel and rdma-core for qedr. Before this change there was a field called dpm_enabled which could hold either 0 or 1 value, this indicated whether RoCE edpm was enabled or not. We modified this field to be dpm_flags, and bit 1 still holds the same meaning of RoCE edpm being enabled or not. Link: https://lore.kernel.org/r/20191121112957.25162-1-michal.kalderon@marvell.com Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
171 lines
4.1 KiB
C
171 lines
4.1 KiB
C
/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR Linux-OpenIB) */
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/* QLogic qedr NIC Driver
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* Copyright (c) 2015-2016 QLogic Corporation
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and /or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef __QEDR_USER_H__
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#define __QEDR_USER_H__
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#include <linux/types.h>
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#define QEDR_ABI_VERSION (8)
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/* user kernel communication data structures. */
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enum qedr_alloc_ucontext_flags {
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QEDR_ALLOC_UCTX_RESERVED = 1 << 0,
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QEDR_ALLOC_UCTX_DB_REC = 1 << 1
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};
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struct qedr_alloc_ucontext_req {
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__u32 context_flags;
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__u32 reserved;
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};
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#define QEDR_LDPM_MAX_SIZE (8192)
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#define QEDR_EDPM_TRANS_SIZE (64)
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enum qedr_rdma_dpm_type {
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QEDR_DPM_TYPE_NONE = 0,
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QEDR_DPM_TYPE_ROCE_ENHANCED = 1 << 0,
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QEDR_DPM_TYPE_ROCE_LEGACY = 1 << 1,
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QEDR_DPM_TYPE_IWARP_LEGACY = 1 << 2,
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QEDR_DPM_TYPE_RESERVED = 1 << 3,
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QEDR_DPM_SIZES_SET = 1 << 4,
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};
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struct qedr_alloc_ucontext_resp {
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__aligned_u64 db_pa;
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__u32 db_size;
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__u32 max_send_wr;
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__u32 max_recv_wr;
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__u32 max_srq_wr;
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__u32 sges_per_send_wr;
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__u32 sges_per_recv_wr;
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__u32 sges_per_srq_wr;
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__u32 max_cqes;
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__u8 dpm_flags;
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__u8 wids_enabled;
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__u16 wid_count;
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__u16 ldpm_limit_size;
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__u8 edpm_trans_size;
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__u8 reserved;
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};
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struct qedr_alloc_pd_ureq {
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__aligned_u64 rsvd1;
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};
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struct qedr_alloc_pd_uresp {
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__u32 pd_id;
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__u32 reserved;
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};
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struct qedr_create_cq_ureq {
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__aligned_u64 addr;
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__aligned_u64 len;
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};
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struct qedr_create_cq_uresp {
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__u32 db_offset;
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__u16 icid;
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__u16 reserved;
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__aligned_u64 db_rec_addr;
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};
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struct qedr_create_qp_ureq {
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__u32 qp_handle_hi;
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__u32 qp_handle_lo;
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/* SQ */
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/* user space virtual address of SQ buffer */
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__aligned_u64 sq_addr;
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/* length of SQ buffer */
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__aligned_u64 sq_len;
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/* RQ */
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/* user space virtual address of RQ buffer */
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__aligned_u64 rq_addr;
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/* length of RQ buffer */
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__aligned_u64 rq_len;
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};
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struct qedr_create_qp_uresp {
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__u32 qp_id;
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__u32 atomic_supported;
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/* SQ */
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__u32 sq_db_offset;
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__u16 sq_icid;
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/* RQ */
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__u32 rq_db_offset;
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__u16 rq_icid;
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__u32 rq_db2_offset;
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__u32 reserved;
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/* address of SQ doorbell recovery user entry */
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__aligned_u64 sq_db_rec_addr;
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/* address of RQ doorbell recovery user entry */
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__aligned_u64 rq_db_rec_addr;
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};
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struct qedr_create_srq_ureq {
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/* user space virtual address of producer pair */
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__aligned_u64 prod_pair_addr;
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/* user space virtual address of SRQ buffer */
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__aligned_u64 srq_addr;
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/* length of SRQ buffer */
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__aligned_u64 srq_len;
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};
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struct qedr_create_srq_uresp {
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__u16 srq_id;
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__u16 reserved0;
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__u32 reserved1;
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};
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/* doorbell recovery entry allocated and populated by userspace doorbelling
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* entities and mapped to kernel. Kernel uses this to register doorbell
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* information with doorbell drop recovery mechanism.
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*/
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struct qedr_user_db_rec {
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__aligned_u64 db_data; /* doorbell data */
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};
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#endif /* __QEDR_USER_H__ */
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