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linux/arch/riscv/include/asm
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Björn Töpel 34bfc10a6e riscv, perf: Add arch specific perf_arch_bpf_user_pt_regs 
RISC-V was missing a proper perf_arch_bpf_user_pt_regs macro for
CONFIG_PERF_EVENT builds.

Signed-off-by: Björn Töpel <bjorn.topel@gmail.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Link: https://lore.kernel.org/bpf/20191216091343.23260-10-bjorn.topel@gmail.com
2019-12-19 16:03:31 +01:00
..
asm-offsets.h
…
asm-prototypes.h
riscv: clean up the macro format in each header file
2019-11-12 12:04:52 -08:00
asm.h
RISC-V: Clear load reservations while restoring hart contexts
2019-10-01 13:16:40 -07:00
atomic.h
locking/atomic, riscv: Use s64 for atomic64
2019-06-03 12:32:56 +02:00
barrier.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234
2019-06-19 17:09:07 +02:00
bitops.h
RISC-V patches for v5.2-rc6
2019-06-17 10:34:03 -07:00
bug.h
riscv: cleanup <asm/bug.h>
2019-10-23 14:53:46 -07:00
cache.h
riscv: add nommu support
2019-11-17 15:17:39 -08:00
cacheflush.h
riscv: fix build break after macro-to-function conversion in generic cacheflush.h
2019-07-18 08:16:56 -07:00
clint.h
riscv: provide native clint access for M-mode
2019-11-17 15:17:39 -08:00
cmpxchg.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
csr.h
riscv: clear the instruction cache and all registers when booting
2019-11-17 15:17:39 -08:00
current.h
riscv: clean up the macro format in each header file
2019-11-12 12:04:52 -08:00
delay.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
elf.h
riscv: add nommu support
2019-11-17 15:17:39 -08:00
fence.h
riscv/spinlock: Strengthen implementations with fences
2018-04-02 19:59:43 -07:00
fixmap.h
riscv: add nommu support
2019-11-17 15:17:39 -08:00
ftrace.h
riscv: clean up the macro format in each header file
2019-11-12 12:04:52 -08:00
futex.h
Merge branch 'next/nommu' into for-next
2019-11-22 18:59:09 -08:00
hugetlb.h
riscv: Introduce huge page support for 32/64bit kernel
2019-07-03 15:23:38 -07:00
hwcap.h
riscv: clean up the macro format in each header file
2019-11-12 12:04:52 -08:00
image.h
riscv: clean up the macro format in each header file
2019-11-12 12:04:52 -08:00
io.h
riscv: add nommu support
2019-11-17 15:17:39 -08:00
irq.h
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
irqflags.h
riscv: abstract out CSR names for supervisor vs machine mode
2019-11-05 09:20:42 -08:00
Kbuild
asm-generic: Make msi.h a mandatory include/asm header
2019-11-26 13:14:11 -06:00
kprobes.h
riscv: clean up the macro format in each header file
2019-11-12 12:04:52 -08:00
linkage.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
mmio.h
generic ioremap support
2019-11-28 10:57:12 -08:00
mmiowb.h
riscv: clean up the macro format in each header file
2019-11-12 12:04:52 -08:00
mmu_context.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
mmu.h
riscv: add nommu support
2019-11-17 15:17:39 -08:00
module.h
RISC-V: Support MODULE_SECTIONS mechanism on RV32
2019-01-07 08:19:20 -08:00
page.h
riscv: add nommu support
2019-11-17 15:17:39 -08:00
pci.h
riscv: clean up the macro format in each header file
2019-11-12 12:04:52 -08:00
perf_event.h
riscv, perf: Add arch specific perf_arch_bpf_user_pt_regs
2019-12-19 16:03:31 +01:00
pgalloc.h
riscv: add nommu support
2019-11-17 15:17:39 -08:00
pgtable-32.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
pgtable-64.h
RISC-V: Setup initial page tables in two stages
2019-07-09 09:08:04 -07:00
pgtable-bits.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
pgtable.h
riscv, bpf: Provide RISC-V specific JIT image alloc/free
2019-12-19 16:03:31 +01:00
processor.h
riscv: abstract out CSR names for supervisor vs machine mode
2019-11-05 09:20:42 -08:00
ptrace.h
riscv: abstract out CSR names for supervisor vs machine mode
2019-11-05 09:20:42 -08:00
sbi.h
riscv: provide native clint access for M-mode
2019-11-17 15:17:39 -08:00
seccomp.h
riscv: add support for SECCOMP and SECCOMP_FILTER
2019-10-29 11:32:10 -07:00
sifive_l2_cache.h
RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs
2019-05-16 20:42:13 -07:00
smp.h
riscv: cleanup riscv_cpuid_to_hartid_mask
2019-09-05 01:51:57 -07:00
sparsemem.h
riscv: clean up the macro format in each header file
2019-11-12 12:04:52 -08:00
spinlock_types.h
riscv: clean up the macro format in each header file
2019-11-12 12:04:52 -08:00
spinlock.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
string.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
switch_to.h
riscv: abstract out CSR names for supervisor vs machine mode
2019-11-05 09:20:42 -08:00
syscall.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
thread_info.h
riscv: add support for SECCOMP and SECCOMP_FILTER
2019-10-29 11:32:10 -07:00
timex.h
riscv: add support for MMIO access to the timer registers
2019-11-13 14:10:40 -08:00
tlb.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
tlbflush.h
riscv: add nommu support
2019-11-17 15:17:39 -08:00
uaccess.h
riscv: add nommu support
2019-11-17 15:17:39 -08:00
unistd.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
vdso.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234
2019-06-19 17:09:07 +02:00
word-at-a-time.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00