350d71b94f
This adds an irqchip driver and corresponding devicetree binding for the secondary interrupt controllers based on Synopsys DesignWare IP dw_apb_ictl. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Jisheng Zhang <jszhang@marvell.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
26 lines
1.0 KiB
Makefile
26 lines
1.0 KiB
Makefile
obj-$(CONFIG_IRQCHIP) += irqchip.o
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obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
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obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o
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obj-$(CONFIG_ARCH_MMP) += irq-mmp.o
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obj-$(CONFIG_ARCH_MVEBU) += irq-armada-370-xp.o
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obj-$(CONFIG_ARCH_MXS) += irq-mxs.o
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obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
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obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o
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obj-$(CONFIG_METAG) += irq-metag-ext.o
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obj-$(CONFIG_METAG_PERFCOUNTER_IRQS) += irq-metag.o
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obj-$(CONFIG_ARCH_MOXART) += irq-moxart.o
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obj-$(CONFIG_ORION_IRQCHIP) += irq-orion.o
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obj-$(CONFIG_ARCH_SUNXI) += irq-sun4i.o
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obj-$(CONFIG_ARCH_SPEAR3XX) += spear-shirq.o
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obj-$(CONFIG_ARM_GIC) += irq-gic.o
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obj-$(CONFIG_ARM_NVIC) += irq-nvic.o
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obj-$(CONFIG_ARM_VIC) += irq-vic.o
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obj-$(CONFIG_IMGPDC_IRQ) += irq-imgpdc.o
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obj-$(CONFIG_SIRF_IRQ) += irq-sirfsoc.o
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obj-$(CONFIG_RENESAS_INTC_IRQPIN) += irq-renesas-intc-irqpin.o
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obj-$(CONFIG_RENESAS_IRQC) += irq-renesas-irqc.o
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obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o
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obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o
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obj-$(CONFIG_TB10X_IRQC) += irq-tb10x.o
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