352e57a3af
Update the sh73a0 specific CPU Hotplug code to make use of the recently introduced shared SCU functions. The sh73a0 power control hardware relies on SCU_PM_POWEROFF with WFI so the shared SCU code will as-is power down the hardware as expected. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
90 lines
2.5 KiB
C
90 lines
2.5 KiB
C
/*
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* SMP support for R-Mobile / SH-Mobile - sh73a0 portion
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*
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* Copyright (C) 2010 Magnus Damm
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* Copyright (C) 2010 Takashi Yoshii
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <mach/common.h>
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#include <mach/sh73a0.h>
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#include <asm/smp_plat.h>
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#include <asm/smp_twd.h>
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#define WUPCR IOMEM(0xe6151010)
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#define SRESCR IOMEM(0xe6151018)
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#define PSTR IOMEM(0xe6151040)
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#define SBAR IOMEM(0xe6180020)
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#define APARMBAREA IOMEM(0xe6f10020)
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#define SH73A0_SCU_BASE 0xf0000000
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#ifdef CONFIG_HAVE_ARM_TWD
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static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, SH73A0_SCU_BASE + 0x600, 29);
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void __init sh73a0_register_twd(void)
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{
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twd_local_timer_register(&twd_local_timer);
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}
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#endif
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static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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unsigned int lcpu = cpu_logical_map(cpu);
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int ret;
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ret = shmobile_smp_scu_boot_secondary(cpu, idle);
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if (ret)
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return ret;
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if (((__raw_readl(PSTR) >> (4 * lcpu)) & 3) == 3)
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__raw_writel(1 << lcpu, WUPCR); /* wake up */
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else
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__raw_writel(1 << lcpu, SRESCR); /* reset */
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return 0;
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}
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static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
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{
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/* Map the reset vector (in headsmp.S) */
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__raw_writel(0, APARMBAREA); /* 4k */
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__raw_writel(__pa(shmobile_boot_vector), SBAR);
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/* setup sh73a0 specific SCU bits */
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shmobile_scu_base = IOMEM(SH73A0_SCU_BASE);
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shmobile_smp_scu_prepare_cpus(max_cpus);
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static int sh73a0_cpu_disable(unsigned int cpu)
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{
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return 0; /* CPU0 and CPU1 supported */
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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struct smp_operations sh73a0_smp_ops __initdata = {
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.smp_prepare_cpus = sh73a0_smp_prepare_cpus,
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.smp_boot_secondary = sh73a0_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_disable = sh73a0_cpu_disable,
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.cpu_die = shmobile_smp_scu_cpu_die,
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.cpu_kill = shmobile_smp_scu_cpu_kill,
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#endif
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};
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