6810ed320e
On AR934x, the MDIO reference clock can be configured to a fixed 100 MHz clock. If that feature is not used, it defaults to the main reference clock, like on all other SoC. Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: John Crispin <john@phrozen.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org
22 lines
530 B
C
22 lines
530 B
C
/*
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* Copyright (C) 2014, 2016 Antony Pavlov <antonynpavlov@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#ifndef __DT_BINDINGS_ATH79_CLK_H
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#define __DT_BINDINGS_ATH79_CLK_H
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#define ATH79_CLK_CPU 0
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#define ATH79_CLK_DDR 1
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#define ATH79_CLK_AHB 2
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#define ATH79_CLK_REF 3
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#define ATH79_CLK_MDIO 4
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#define ATH79_CLK_END 5
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#endif /* __DT_BINDINGS_ATH79_CLK_H */
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