linux/Documentation/devicetree
Maxime Ripard 37e1041f04 clk: sunxi: mod0: Introduce MMC proper phase handling
The MMC clock we thought we had until now are actually not one but three
different clocks.

The main one is unchanged, and will have three outputs:
  - The clock fed into the MMC
  - a sample and output clocks, to deal with when should we output/sample data
    to/from the MMC bus

The phase control we had are actually controlling the two latter clocks, but
the main MMC one is unchanged.

We can adjust the phase with a 3 bits value, from 0 to 7, 0 meaning a 180 phase
shift, and the other values being the number of periods from the MMC parent
clock to outphase the clock of.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
2014-09-27 08:58:04 +02:00
..
bindings clk: sunxi: mod0: Introduce MMC proper phase handling 2014-09-27 08:58:04 +02:00
00-INDEX
booting-without-of.txt
changesets.txt of: Transactional DT support. 2014-07-23 17:29:15 -06:00
todo.txt of: Add todo tasklist for Devicetree 2014-07-23 17:33:01 -06:00
usage-model.txt