This adds device tree bindings for the Ux500 HASH block as a compatible in the STM32 HASH bindings. The Ux500 HASH binding has been used for ages in the kernel device tree for Ux500 but was never documented, so fill in the gap by making it a sibling of the STM32 HASH block, which is what it is. The relationship to the existing STM32 HASH block is pretty obvious when looking at the register map, and I have written patches to reuse the STM32 HASH driver on the Ux500. The main difference from the outside is that the Ux500 HASH lacks the interrupt line, so some special if-clauses are needed to accomodate this in the binding. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
90 lines
1.7 KiB
YAML
90 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STMicroelectronics STM32 HASH
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description: The STM32 HASH block is built on the HASH block found in
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the STn8820 SoC introduced in 2007, and subsequently used in the U8500
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SoC in 2010.
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maintainers:
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- Lionel Debieve <lionel.debieve@foss.st.com>
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properties:
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compatible:
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enum:
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- st,stn8820-hash
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- stericsson,ux500-hash
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- st,stm32f456-hash
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- st,stm32f756-hash
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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interrupts:
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maxItems: 1
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resets:
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maxItems: 1
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dmas:
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maxItems: 1
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dma-names:
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items:
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- const: in
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dma-maxburst:
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description: Set number of maximum dma burst supported
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 2
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default: 0
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power-domains:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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allOf:
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- if:
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properties:
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compatible:
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items:
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const: stericsson,ux500-hash
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then:
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properties:
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interrupts: false
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else:
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required:
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/stm32mp1-clks.h>
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#include <dt-bindings/reset/stm32mp1-resets.h>
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hash@54002000 {
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compatible = "st,stm32f756-hash";
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reg = <0x54002000 0x400>;
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interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc HASH1>;
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resets = <&rcc HASH1_R>;
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dmas = <&mdma1 31 0x10 0x1000A02 0x0 0x0>;
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dma-names = "in";
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dma-maxburst = <2>;
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};
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...
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