Kan Liang 848df133cc perf/x86/intel/uncore: Fix Intel SPR M3UPI event constraints
[ Upstream commit 4034fb207e302cc0b1f304084d379640c1fb1436 ]

SPR M3UPI have the exact same event constraints as ICX, so add the
constraints.

Fixes: 2a8e51eae7c8 ("perf/x86/intel/uncore: Add Sapphire Rapids server M3UPI support")
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1629991963-102621-8-git-send-email-kan.liang@linux.intel.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-11-18 19:16:22 +01:00
..
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2021-09-24 13:35:07 +02:00
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