89351925a4
The GEM object is grossly overweight for the practicality of tracking large numbers of individual pages, yet it is currently our only abstraction for tracking DMA allocations. Since those allocations need to be reserved upfront before an operation, and that we need to break away from simple system memory, we need to ditch using plain struct page wrappers. In the process, we drop the WC mapping as we ended up clflushing everything anyway due to various issues across a wider range of platforms. Though in a future step, we need to drop the kmap_atomic approach which suggests we need to pre-map all the pages and keep them mapped. v2: Verify our large scratch page is suitably DMA aligned; and manually clear the scratch since we are allocating plain struct pages full of prior content. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200729164219.5737-2-chris@chris-wilson.co.uk Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
78 lines
2.1 KiB
C
78 lines
2.1 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2020 Intel Corporation
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*/
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#ifndef __GEN6_PPGTT_H__
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#define __GEN6_PPGTT_H__
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#include "intel_gtt.h"
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struct gen6_ppgtt {
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struct i915_ppgtt base;
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struct mutex flush;
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struct i915_vma *vma;
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gen6_pte_t __iomem *pd_addr;
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u32 pp_dir;
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atomic_t pin_count;
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struct mutex pin_mutex;
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bool scan_for_unused_pt;
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};
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static inline u32 gen6_pte_index(u32 addr)
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{
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return i915_pte_index(addr, GEN6_PDE_SHIFT);
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}
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static inline u32 gen6_pte_count(u32 addr, u32 length)
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{
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return i915_pte_count(addr, length, GEN6_PDE_SHIFT);
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}
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static inline u32 gen6_pde_index(u32 addr)
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{
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return i915_pde_index(addr, GEN6_PDE_SHIFT);
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}
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#define __to_gen6_ppgtt(base) container_of(base, struct gen6_ppgtt, base)
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static inline struct gen6_ppgtt *to_gen6_ppgtt(struct i915_ppgtt *base)
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{
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BUILD_BUG_ON(offsetof(struct gen6_ppgtt, base));
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return __to_gen6_ppgtt(base);
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}
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/*
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* gen6_for_each_pde() iterates over every pde from start until start+length.
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* If start and start+length are not perfectly divisible, the macro will round
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* down and up as needed. Start=0 and length=2G effectively iterates over
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* every PDE in the system. The macro modifies ALL its parameters except 'pd',
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* so each of the other parameters should preferably be a simple variable, or
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* at most an lvalue with no side-effects!
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*/
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#define gen6_for_each_pde(pt, pd, start, length, iter) \
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for (iter = gen6_pde_index(start); \
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length > 0 && iter < I915_PDES && \
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(pt = i915_pt_entry(pd, iter), true); \
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({ u32 temp = ALIGN(start+1, 1 << GEN6_PDE_SHIFT); \
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temp = min(temp - start, length); \
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start += temp, length -= temp; }), ++iter)
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#define gen6_for_all_pdes(pt, pd, iter) \
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for (iter = 0; \
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iter < I915_PDES && \
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(pt = i915_pt_entry(pd, iter), true); \
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++iter)
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int gen6_ppgtt_pin(struct i915_ppgtt *base);
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void gen6_ppgtt_unpin(struct i915_ppgtt *base);
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void gen6_ppgtt_unpin_all(struct i915_ppgtt *base);
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void gen6_ppgtt_enable(struct intel_gt *gt);
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void gen7_ppgtt_enable(struct intel_gt *gt);
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struct i915_ppgtt *gen6_ppgtt_create(struct intel_gt *gt);
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#endif
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