4089caa7d0
For most OCTEON SoCs there is a repeated and redundant register definition for almost every hardware register, although the register bit fields would not differ from other SoCs. Since the driver code should use only one definition for simplicity, these other fields are just redundant and can be deleted. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@vger.kernel.org
141 lines
3.6 KiB
C
141 lines
3.6 KiB
C
/***********************license start***************
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* Author: Cavium Networks
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*
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* Contact: support@caviumnetworks.com
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* This file is part of the OCTEON SDK
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*
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* Copyright (c) 2003-2012 Cavium Networks
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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* published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful, but
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* AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
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* NONINFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this file; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* or visit http://www.gnu.org/licenses/.
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*
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* This file may also be available under a different license from Cavium.
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* Contact Cavium Networks for more information
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***********************license end**************************************/
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#ifndef __CVMX_SRXX_DEFS_H__
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#define __CVMX_SRXX_DEFS_H__
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#define CVMX_SRXX_COM_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000200ull) + ((block_id) & 1) * 0x8000000ull)
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#define CVMX_SRXX_IGN_RX_FULL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000218ull) + ((block_id) & 1) * 0x8000000ull)
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#define CVMX_SRXX_SPI4_CALX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180090000000ull) + (((offset) & 31) + ((block_id) & 1) * 0x1000000ull) * 8)
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#define CVMX_SRXX_SPI4_STAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000208ull) + ((block_id) & 1) * 0x8000000ull)
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#define CVMX_SRXX_SW_TICK_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000220ull) + ((block_id) & 1) * 0x8000000ull)
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#define CVMX_SRXX_SW_TICK_DAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000228ull) + ((block_id) & 1) * 0x8000000ull)
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union cvmx_srxx_com_ctl {
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uint64_t u64;
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struct cvmx_srxx_com_ctl_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_8_63:56;
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uint64_t prts:4;
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uint64_t st_en:1;
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uint64_t reserved_1_2:2;
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uint64_t inf_en:1;
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#else
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uint64_t inf_en:1;
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uint64_t reserved_1_2:2;
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uint64_t st_en:1;
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uint64_t prts:4;
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uint64_t reserved_8_63:56;
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#endif
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} s;
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};
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union cvmx_srxx_ign_rx_full {
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uint64_t u64;
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struct cvmx_srxx_ign_rx_full_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_16_63:48;
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uint64_t ignore:16;
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#else
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uint64_t ignore:16;
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uint64_t reserved_16_63:48;
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#endif
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} s;
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};
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union cvmx_srxx_spi4_calx {
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uint64_t u64;
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struct cvmx_srxx_spi4_calx_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_17_63:47;
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uint64_t oddpar:1;
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uint64_t prt3:4;
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uint64_t prt2:4;
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uint64_t prt1:4;
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uint64_t prt0:4;
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#else
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uint64_t prt0:4;
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uint64_t prt1:4;
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uint64_t prt2:4;
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uint64_t prt3:4;
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uint64_t oddpar:1;
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uint64_t reserved_17_63:47;
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#endif
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} s;
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};
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union cvmx_srxx_spi4_stat {
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uint64_t u64;
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struct cvmx_srxx_spi4_stat_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_16_63:48;
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uint64_t m:8;
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uint64_t reserved_7_7:1;
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uint64_t len:7;
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#else
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uint64_t len:7;
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uint64_t reserved_7_7:1;
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uint64_t m:8;
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uint64_t reserved_16_63:48;
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#endif
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} s;
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};
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union cvmx_srxx_sw_tick_ctl {
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uint64_t u64;
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struct cvmx_srxx_sw_tick_ctl_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_14_63:50;
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uint64_t eop:1;
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uint64_t sop:1;
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uint64_t mod:4;
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uint64_t opc:4;
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uint64_t adr:4;
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#else
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uint64_t adr:4;
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uint64_t opc:4;
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uint64_t mod:4;
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uint64_t sop:1;
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uint64_t eop:1;
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uint64_t reserved_14_63:50;
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#endif
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} s;
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};
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union cvmx_srxx_sw_tick_dat {
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uint64_t u64;
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struct cvmx_srxx_sw_tick_dat_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t dat:64;
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#else
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uint64_t dat:64;
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#endif
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} s;
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};
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#endif
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