3b3a95c8be
By using the handle, we can avoid some duplication of the base DT and so avoid any maintenance overhead in the QP DT if the referenced node changes. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
113 lines
3.9 KiB
Plaintext
113 lines
3.9 KiB
Plaintext
/*
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* Copyright 2016 Freescale Semiconductor, Inc.
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "imx6q.dtsi"
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/ {
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soc {
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ocram2: sram@00940000 {
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compatible = "mmio-sram";
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reg = <0x00940000 0x20000>;
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clocks = <&clks IMX6QDL_CLK_OCRAM>;
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};
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ocram3: sram@00960000 {
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compatible = "mmio-sram";
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reg = <0x00960000 0x20000>;
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clocks = <&clks IMX6QDL_CLK_OCRAM>;
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};
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ipu1: ipu@02400000 {
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compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
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clocks = <&clks IMX6QDL_CLK_IPU1>,
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<&clks IMX6QDL_CLK_IPU1_DI0>, <&clks IMX6QDL_CLK_IPU1_DI1>,
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<&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>,
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<&clks IMX6QDL_CLK_PRG0_APB>;
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clock-names = "bus",
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"di0", "di1",
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"di0_sel", "di1_sel",
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"ldb_di0", "ldb_di1", "prg";
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};
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ipu2: ipu@02800000 {
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compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
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clocks = <&clks IMX6QDL_CLK_IPU2>,
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<&clks IMX6QDL_CLK_IPU2_DI0>, <&clks IMX6QDL_CLK_IPU2_DI1>,
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<&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>,
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<&clks IMX6QDL_CLK_PRG1_APB>;
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clock-names = "bus",
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"di0", "di1",
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"di0_sel", "di1_sel",
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"ldb_di0", "ldb_di1", "prg";
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};
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aips-bus@02100000 {
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mmdc0: mmdc@021b0000 { /* MMDC0 */
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compatible = "fsl,imx6qp-mmdc", "fsl,imx6q-mmdc";
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reg = <0x021b0000 0x4000>;
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};
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};
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};
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};
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&fec {
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/delete-property/interrupts-extended;
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interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>,
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<0 119 IRQ_TYPE_LEVEL_HIGH>;
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};
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&ldb {
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clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
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<&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
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<&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>;
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clock-names = "di0_pll", "di1_pll",
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"di0_sel", "di1_sel", "di2_sel", "di3_sel",
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"di0", "di1";
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};
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&pcie {
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compatible = "fsl,imx6qp-pcie", "snps,dw-pcie";
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};
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