linux/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
Andre Przywara 382e0d4f9e dt-bindings: spi: sunxi: document F1C100 controllers
The Allwinner F1C100 series contains two SPI controllers, which are
compatible to the IP block used in the Allwinner H3 as well.
The only difference in the integration is the missing mod clock in the
F1C100, but that does not affect the SPI controller binding, as we can
still supply the correct clock (AHB parent) easily.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Samuel Holland <samuel@sholland.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220317162349.739636-11-andre.przywara@arm.com
2022-04-06 22:27:28 +02:00

115 lines
2.2 KiB
YAML

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A31 SPI Controller Device Tree Bindings
allOf:
- $ref: "spi-controller.yaml"
maintainers:
- Chen-Yu Tsai <wens@csie.org>
- Maxime Ripard <mripard@kernel.org>
properties:
"#address-cells": true
"#size-cells": true
compatible:
oneOf:
- const: allwinner,sun6i-a31-spi
- const: allwinner,sun8i-h3-spi
- items:
- enum:
- allwinner,sun8i-r40-spi
- allwinner,sun50i-h6-spi
- allwinner,sun50i-h616-spi
- allwinner,suniv-f1c100s-spi
- const: allwinner,sun8i-h3-spi
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: Bus Clock
- description: Module Clock
clock-names:
items:
- const: ahb
- const: mod
resets:
maxItems: 1
dmas:
items:
- description: RX DMA Channel
- description: TX DMA Channel
dma-names:
items:
- const: rx
- const: tx
num-cs: true
patternProperties:
"^.*@[0-9a-f]+":
type: object
properties:
reg:
items:
minimum: 0
maximum: 4
spi-rx-bus-width:
const: 1
spi-tx-bus-width:
const: 1
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
additionalProperties: false
examples:
- |
spi1: spi@1c69000 {
compatible = "allwinner,sun6i-a31-spi";
reg = <0x01c69000 0x1000>;
interrupts = <0 66 4>;
clocks = <&ahb1_gates 21>, <&spi1_clk>;
clock-names = "ahb", "mod";
resets = <&ahb1_rst 21>;
#address-cells = <1>;
#size-cells = <0>;
};
- |
spi0: spi@1c68000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x01c68000 0x1000>;
interrupts = <0 65 4>;
clocks = <&ccu 30>, <&ccu 82>;
clock-names = "ahb", "mod";
dmas = <&dma 23>, <&dma 23>;
dma-names = "rx", "tx";
resets = <&ccu 15>;
#address-cells = <1>;
#size-cells = <0>;
};
...