31cdd0c39c
xmon has commands for reading and writing SPRs, but they don't work currently for several reasons. They attempt to synthesize a small function containing an mfspr or mtspr instruction and call it. However, the instructions are on the stack, which is usually not executable. Also, for 64-bit we set up a procedure descriptor, which is fine for the big-endian ABIv1, but not correct for ABIv2. Finally, the code uses the infrastructure for catching memory errors, but that only catches data storage interrupts and machine check interrupts, but a failed mfspr/mtspr can generate a program interrupt or a hypervisor emulation assist interrupt, or be a no-op. Instead of trying to synthesize a function on the fly, this adds two new functions, xmon_mfspr() and xmon_mtspr(), which take an SPR number as an argument and read or write the SPR. Because there is no Power ISA instruction which takes an SPR number in a register, we have to generate one of each possible mfspr and mtspr instruction, for all 1024 possible SPRs. Thus we get just over 8k bytes of code for each of xmon_mfspr() and xmon_mtspr(). However, this 16kB of code pales in comparison to the > 130kB of PPC opcode tables used by the xmon disassembler. To catch interrupts caused by the mfspr/mtspr instructions, we add a new 'catch_spr_faults' flag. If an interrupt occurs while it is set, we come back into xmon() via program_check_interrupt(), _exception() and die(), see that catch_spr_faults is set and do a longjmp to bus_error_jmp, back into read_spr() or write_spr(). This adds a couple of other nice features: first, a "Sa" command that attempts to read and print out the value of all 1024 SPRs. If any mfspr instruction acts as a no-op, then the SPR is not implemented and not printed. Secondly, the Sr and Sw commands detect when an SPR is not implemented (i.e. mfspr is a no-op) and print a message to that effect rather than printing a bogus value. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
46 lines
739 B
ArmAsm
46 lines
739 B
ArmAsm
#include <asm/ppc_asm.h>
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/* unsigned long xmon_mfspr(sprn, default_value) */
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_GLOBAL(xmon_mfspr)
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ld r5, .Lmfspr_table@got(r2)
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b xmon_mxspr
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/* void xmon_mtspr(sprn, new_value) */
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_GLOBAL(xmon_mtspr)
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ld r5, .Lmtspr_table@got(r2)
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b xmon_mxspr
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/*
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* r3 = sprn
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* r4 = default or new value
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* r5 = table base
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*/
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xmon_mxspr:
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/*
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* To index into the table of mxsprs we need:
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* i = (sprn & 0x3ff) * 8
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* or using rwlinm:
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* i = (sprn << 3) & (0x3ff << 3)
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*/
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rlwinm r3, r3, 3, 0x3ff << 3
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add r5, r5, r3
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mtctr r5
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mr r3, r4 /* put default_value in r3 for mfspr */
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bctr
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.Lmfspr_table:
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spr = 0
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.rept 1024
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mfspr r3, spr
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blr
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spr = spr + 1
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.endr
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.Lmtspr_table:
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spr = 0
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.rept 1024
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mtspr spr, r4
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blr
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spr = spr + 1
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.endr
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