linux/include/dt-bindings
Stephen Boyd 3ce6c6e541 The i.MX clock updates for 4.4:
- A couple of fixes on i.MX31 and i.MX35 clock initialization functions
    which makes mxc_timer_init() currently be called twice for DT boot.
  - Increase i.MX6UL AXI bus clock rate to 264MHz which is the optimal
    design target.
  - Add a few missing clocks, ADC clock for i.MX7D, OCOTP clock for
    Vybrid, and SPDIF_GCLK for i.MX6.
  - A series from Lucas to fix early debug UART clock setup.  This is
    currently a one-off fix for i.MX platform, and can be extended to
    become a generic solution later.
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Merge tag 'imx-clk-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next

Pull i.MX updates from Shawn Guo:

"The i.MX clock updates for 4.4:
 - A couple of fixes on i.MX31 and i.MX35 clock initialization functions
   which makes mxc_timer_init() currently be called twice for DT boot.
 - Increase i.MX6UL AXI bus clock rate to 264MHz which is the optimal
   design target.
 - Add a few missing clocks, ADC clock for i.MX7D, OCOTP clock for
   Vybrid, and SPDIF_GCLK for i.MX6.
 - A series from Lucas to fix early debug UART clock setup.  This is
   currently a one-off fix for i.MX platform, and can be extended to
   become a generic solution later."

* tag 'imx-clk-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  clk: imx6: Add SPDIF_GCLK clock in clock tree
  clk: imx7d: add ADC root clock
  clk: imx31: Do not call mxc_timer_init twice when booting with DT
  clk: imx7d: retain early UART clocks during kernel init
  clk: imx6: retain early UART clocks during kernel init
  clk: imx5: retain early UART clocks during kernel init
  clk: imx35: retain early UART clocks during kernel init
  clk: imx31: retain early UART clocks during kernel init
  clk: imx27: retain early UART clocks during kernel init
  clk: imx25: retain early UART clocks during kernel init
  clk: imx: add common logic to detect early UART usage
  clk: imx35: Do not call mxc_timer_init twice when booting with DT
  clk: clk-vf610: Add clock for Vybrid OCOTP controller
  clk: imx: increase AXI clock rate to 264MHz for i.MX6UL
2015-10-16 11:35:19 -07:00
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2015-10-16 11:35:19 -07:00
2015-04-07 11:44:40 +02:00
2015-01-28 18:42:00 +00:00
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