e85e335f8f
MMUv3 comes out of reset with identity vaddr -> paddr mapping in the TLB
way 6:
Way 6 (512 MB)
Vaddr Paddr ASID Attr RWX Cache
---------- ---------- ---- ---- --- -------
0x00000000 0x00000000 0x01 0x03 RWX Bypass
0x20000000 0x20000000 0x01 0x03 RWX Bypass
0x40000000 0x40000000 0x01 0x03 RWX Bypass
0x60000000 0x60000000 0x01 0x03 RWX Bypass
0x80000000 0x80000000 0x01 0x03 RWX Bypass
0xa0000000 0xa0000000 0x01 0x03 RWX Bypass
0xc0000000 0xc0000000 0x01 0x03 RWX Bypass
0xe0000000 0xe0000000 0x01 0x03 RWX Bypass
This patch adds remapping code at the reset vector or at the kernel
_start (depending on CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) that
reconfigures MMUv3 as MMUv2:
Way 5 (128 MB)
Vaddr Paddr ASID Attr RWX Cache
---------- ---------- ---- ---- --- -------
0xd0000000 0x00000000 0x01 0x07 RWX WB
0xd8000000 0x00000000 0x01 0x03 RWX Bypass
Way 6 (256 MB)
Vaddr Paddr ASID Attr RWX Cache
---------- ---------- ---- ---- --- -------
0xe0000000 0xf0000000 0x01 0x07 RWX WB
0xf0000000 0xf0000000 0x01 0x03 RWX Bypass
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
126 lines
4.1 KiB
C
126 lines
4.1 KiB
C
/*
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* arch/xtensa/include/asm/xchal_vaddr_remap.h
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*
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* Xtensa macros for MMU V3 Support. Deals with re-mapping the Virtual
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* Memory Addresses from "Virtual == Physical" to their prevvious V2 MMU
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* mappings (KSEG at 0xD0000000 and KIO at 0XF0000000).
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2008 - 2012 Tensilica Inc.
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*
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* Pete Delaney <piet@tensilica.com>
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* Marc Gauthier <marc@tensilica.com
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*/
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#ifndef _XTENSA_VECTORS_H
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#define _XTENSA_VECTORS_H
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#include <variant/core.h>
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#if defined(CONFIG_MMU)
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/* Will Become VECBASE */
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#define VIRTUAL_MEMORY_ADDRESS 0xD0000000
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/* Image Virtual Start Address */
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#define KERNELOFFSET 0xD0003000
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#if defined(XCHAL_HAVE_PTP_MMU) && XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
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/* MMU v3 - XCHAL_HAVE_PTP_MMU == 1 */
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#define PHYSICAL_MEMORY_ADDRESS 0x00000000
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#define LOAD_MEMORY_ADDRESS 0x00003000
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#else
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/* MMU V2 - XCHAL_HAVE_PTP_MMU == 0 */
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#define PHYSICAL_MEMORY_ADDRESS 0xD0000000
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#define LOAD_MEMORY_ADDRESS 0xD0003000
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#endif
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#else /* !defined(CONFIG_MMU) */
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/* MMU Not being used - Virtual == Physical */
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/* VECBASE */
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#define VIRTUAL_MEMORY_ADDRESS 0x00002000
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/* Location of the start of the kernel text, _start */
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#define KERNELOFFSET 0x00003000
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#define PHYSICAL_MEMORY_ADDRESS 0x00000000
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/* Loaded just above possibly live vectors */
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#define LOAD_MEMORY_ADDRESS 0x00003000
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#endif /* CONFIG_MMU */
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#define XC_VADDR(offset) (VIRTUAL_MEMORY_ADDRESS + offset)
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#define XC_PADDR(offset) (PHYSICAL_MEMORY_ADDRESS + offset)
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/* Used to set VECBASE register */
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#define VECBASE_RESET_VADDR VIRTUAL_MEMORY_ADDRESS
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#define RESET_VECTOR_VECOFS (XCHAL_RESET_VECTOR_VADDR - \
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VECBASE_RESET_VADDR)
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#define RESET_VECTOR_VADDR XC_VADDR(RESET_VECTOR_VECOFS)
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#define RESET_VECTOR1_VECOFS (XCHAL_RESET_VECTOR1_VADDR - \
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VECBASE_RESET_VADDR)
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#define RESET_VECTOR1_VADDR XC_VADDR(RESET_VECTOR1_VECOFS)
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#if XCHAL_HAVE_VECBASE
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#define USER_VECTOR_VADDR XC_VADDR(XCHAL_USER_VECOFS)
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#define KERNEL_VECTOR_VADDR XC_VADDR(XCHAL_KERNEL_VECOFS)
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#define DOUBLEEXC_VECTOR_VADDR XC_VADDR(XCHAL_DOUBLEEXC_VECOFS)
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#define WINDOW_VECTORS_VADDR XC_VADDR(XCHAL_WINDOW_OF4_VECOFS)
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#define INTLEVEL2_VECTOR_VADDR XC_VADDR(XCHAL_INTLEVEL2_VECOFS)
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#define INTLEVEL3_VECTOR_VADDR XC_VADDR(XCHAL_INTLEVEL3_VECOFS)
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#define INTLEVEL4_VECTOR_VADDR XC_VADDR(XCHAL_INTLEVEL4_VECOFS)
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#define INTLEVEL5_VECTOR_VADDR XC_VADDR(XCHAL_INTLEVEL5_VECOFS)
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#define INTLEVEL6_VECTOR_VADDR XC_VADDR(XCHAL_INTLEVEL6_VECOFS)
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#define DEBUG_VECTOR_VADDR XC_VADDR(XCHAL_DEBUG_VECOFS)
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#undef XCHAL_NMI_VECTOR_VADDR
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#define XCHAL_NMI_VECTOR_VADDR XC_VADDR(XCHAL_NMI_VECOFS)
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#undef XCHAL_INTLEVEL7_VECTOR_VADDR
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#define XCHAL_INTLEVEL7_VECTOR_VADDR XC_VADDR(XCHAL_INTLEVEL7_VECOFS)
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/*
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* These XCHAL_* #defines from varian/core.h
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* are not valid to use with V3 MMU. Non-XCHAL
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* constants are defined above and should be used.
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*/
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#undef XCHAL_VECBASE_RESET_VADDR
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#undef XCHAL_RESET_VECTOR0_VADDR
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#undef XCHAL_USER_VECTOR_VADDR
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#undef XCHAL_KERNEL_VECTOR_VADDR
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#undef XCHAL_DOUBLEEXC_VECTOR_VADDR
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#undef XCHAL_WINDOW_VECTORS_VADDR
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#undef XCHAL_INTLEVEL2_VECTOR_VADDR
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#undef XCHAL_INTLEVEL3_VECTOR_VADDR
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#undef XCHAL_INTLEVEL4_VECTOR_VADDR
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#undef XCHAL_INTLEVEL5_VECTOR_VADDR
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#undef XCHAL_INTLEVEL6_VECTOR_VADDR
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#undef XCHAL_DEBUG_VECTOR_VADDR
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#undef XCHAL_NMI_VECTOR_VADDR
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#undef XCHAL_INTLEVEL7_VECTOR_VADDR
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#else
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#define USER_VECTOR_VADDR XCHAL_USER_VECTOR_VADDR
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#define KERNEL_VECTOR_VADDR XCHAL_KERNEL_VECTOR_VADDR
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#define DOUBLEEXC_VECTOR_VADDR XCHAL_DOUBLEEXC_VECTOR_VADDR
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#define WINDOW_VECTORS_VADDR XCHAL_WINDOW_VECTORS_VADDR
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#define INTLEVEL2_VECTOR_VADDR XCHAL_INTLEVEL2_VECTOR_VADDR
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#define INTLEVEL3_VECTOR_VADDR XCHAL_INTLEVEL3_VECTOR_VADDR
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#define INTLEVEL4_VECTOR_VADDR XCHAL_INTLEVEL4_VECTOR_VADDR
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#define INTLEVEL5_VECTOR_VADDR XCHAL_INTLEVEL5_VECTOR_VADDR
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#define INTLEVEL6_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
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#define DEBUG_VECTOR_VADDR XCHAL_DEBUG_VECTOR_VADDR
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#endif
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#endif /* _XTENSA_VECTORS_H */
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