f29ad10de6
- Fix hanging ethernet issue of LS1B v2.0 by adding pbl field in plat data. (It seems that the MAC controller of LS1B v2.0 can only accept pbl=1) - Add GMAC1 support and setup MUX in terms of PHY mode. - Add CPUFreq support. - Add MUX Register Definitions. - Add PWM Register Definitions. - Update clock register bitfields according to the latest spec. - Update clock related stuff. Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8024/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
33 lines
776 B
C
33 lines
776 B
C
/*
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* Copyright (c) 2011 Zhang, Keguang <keguang.zhang@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <platform.h>
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static struct platform_device *ls1b_platform_devices[] __initdata = {
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&ls1x_uart_pdev,
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&ls1x_cpufreq_pdev,
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&ls1x_eth0_pdev,
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&ls1x_eth1_pdev,
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&ls1x_ehci_pdev,
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&ls1x_rtc_pdev,
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};
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static int __init ls1b_platform_init(void)
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{
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int err;
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ls1x_serial_setup(&ls1x_uart_pdev);
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err = platform_add_devices(ls1b_platform_devices,
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ARRAY_SIZE(ls1b_platform_devices));
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return err;
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}
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arch_initcall(ls1b_platform_init);
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