ecdeca6d96
The AM57xx family of SoCs contains two identical PRU-ICSS instances that have a very unique SYSC register. The IPs do not have any PRCM reset lines unlike those on AM33xx/AM437x SoCs. Add the PRUSS interconnect target-module nodes with all the required properties. Each of the PRUSS devices themselves shall be added as child nodes to the corresponding interconnect node in the future. The PRU-ICSS instances are only available on AM57xx family of SoCs and are not supported on DRA7xx family of SoCs in general, so the target module nodes are added in a separate dtsi file. This new dtsi file is included in all the AM57xx SoC dtsi files, so the nodes are automatically inherited and enabled on all AM57xx boards. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
51 lines
1.4 KiB
Plaintext
51 lines
1.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
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*
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* Common PRUSS data for TI AM57xx platforms
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*/
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&ocp {
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pruss1_tm: target-module@4b226000 {
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compatible = "ti,sysc-pruss", "ti,sysc";
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reg = <0x4b226000 0x4>,
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<0x4b226004 0x4>;
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reg-names = "rev", "sysc";
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ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT |
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SYSC_PRUSS_SUB_MWAIT)>;
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ti,sysc-midle = <SYSC_IDLE_FORCE>,
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>;
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ti,sysc-sidle = <SYSC_IDLE_FORCE>,
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>;
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/* Domains (P, C): coreaon_pwrdm, l4per2_clkdm */
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clocks = <&l4per2_clkctrl DRA7_L4PER2_PRUSS1_CLKCTRL 0>;
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clock-names = "fck";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00000000 0x4b200000 0x80000>;
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};
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pruss2_tm: target-module@4b2a6000 {
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compatible = "ti,sysc-pruss", "ti,sysc";
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reg = <0x4b2a6000 0x4>,
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<0x4b2a6004 0x4>;
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reg-names = "rev", "sysc";
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ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT |
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SYSC_PRUSS_SUB_MWAIT)>;
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ti,sysc-midle = <SYSC_IDLE_FORCE>,
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>;
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ti,sysc-sidle = <SYSC_IDLE_FORCE>,
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>;
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/* Domains (P, C): coreaon_pwrdm, l4per2_clkdm */
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clocks = <&l4per2_clkctrl DRA7_L4PER2_PRUSS2_CLKCTRL 0>;
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clock-names = "fck";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00000000 0x4b280000 0x80000>;
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};
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};
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