Lars-Peter Clausen df1d80aee9 iio: ad_sigma_delta: Properly handle SPI bus locking vs CS assertion
For devices from the SigmaDelta family we need to keep CS low when doing a
conversion, since the device will use the MISO line as a interrupt to
indicate that the conversion is complete.

This is why the driver locks the SPI bus and when the SPI bus is locked
keeps as long as a conversion is going on. The current implementation gets
one small detail wrong though. CS is only de-asserted after the SPI bus is
unlocked. This means it is possible for a different SPI device on the same
bus to send a message which would be wrongfully be addressed to the
SigmaDelta device as well. Make sure that the last SPI transfer that is
done while holding the SPI bus lock de-asserts the CS signal.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Alexandru Ardelean <Alexandru.Ardelean@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2019-04-04 20:21:15 +01:00
..
2019-02-15 13:21:55 +08:00
2019-03-01 09:45:52 -05:00
2019-01-25 16:40:40 +01:00
2019-02-27 09:19:24 -05:00
2019-03-10 12:29:52 -07:00
2019-03-15 14:05:00 -07:00
2019-03-16 12:28:18 -07:00
2019-03-09 14:45:54 -08:00