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Maxime Chevallier 565f02fc1e dt-bindings: net: altera: tse: add an optional pcs register range 
Some implementations of the TSE have their PCS as an external bloc,
exposed at its own register range. Document this, and add a new example
showing a case using the pcs and the new phylink conversion to connect
an sfp port to a TSE mac.

Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-05 10:16:53 +01:00
..
bindings
dt-bindings: net: altera: tse: add an optional pcs register range
2022-09-05 10:16:53 +01:00
changesets.rst
docs: dt: Make 'Devicetree' wording more consistent
2021-03-27 12:58:04 -06:00
dynamic-resolution-notes.rst
docs: dt: Make 'Devicetree' wording more consistent
2021-03-27 12:58:04 -06:00
index.rst
docs: dt: Add DT API documentation
2021-03-27 12:59:03 -06:00
kernel-api.rst
docs: dt: Add DT API documentation
2021-03-27 12:59:03 -06:00
of_unittest.rst
of: unittest: add program to process EXPECT messages
2022-02-28 15:20:32 -06:00
overlay-notes.rst
of: overlay: rework overlay apply and remove kfree()s
2022-04-25 10:56:11 -05:00
usage-model.rst
docs: dt: Make 'Devicetree' wording more consistent
2021-03-27 12:58:04 -06:00