Andreas Herrmann 3fdbf004c1 x86, mtrr: Assume SYS_CFG[Tom2ForceMemTypeWB] exists on all future AMD CPUs ...

Instead of adapting the CPU family check in amd_special_default_mtrr()
for each new CPU family assume that all new AMD CPUs support the
necessary bits in SYS_CFG MSR.

Tom2Enabled is architectural (defined in APM Vol.2).
Tom2ForceMemTypeWB is defined in all BKDGs starting with K8 NPT.
In pre K8-NPT BKDG this bit is reserved (read as zero).

W/o this adaption Linux would unnecessarily complain about bad MTRR
settings on every new AMD CPU family, e.g.

[    0.000000] WARNING: BIOS bug: CPU MTRRs don't cover all of memory, losing 4863MB of RAM.

Cc: stable@kernel.org # .32.x, .35.x
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
LKML-Reference: <20100930123235.GB20545@loge.amd.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>

2010-10-01 16:18:31 -07:00

..

amd.c

x86, mtrr: Constify struct mtrr_ops

2010-02-01 11:20:43 -08:00

centaur.c

x86, mtrr: Constify struct mtrr_ops

2010-02-01 11:20:43 -08:00

cleanup.c

x86, mtrr: Assume SYS_CFG[Tom2ForceMemTypeWB] exists on all future AMD CPUs

2010-10-01 16:18:31 -07:00

cyrix.c

x86, mtrr: Constify struct mtrr_ops

2010-02-01 11:20:43 -08:00

generic.c

x86, gcc-4.6: Fix set but not read variables

2010-07-20 15:38:30 -07:00

if.c

include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h

2010-03-30 22:02:32 +09:00

main.c

x86, mtrr: Use stop machine context to rendezvous all the cpu's

2010-07-30 15:59:49 -07:00

Makefile

x86, mtrr: Remove unused mtrr/state.c

2010-02-04 10:01:38 +01:00

mtrr.h

x86, mtrr: Constify struct mtrr_ops

2010-02-01 11:20:43 -08:00