41195d236e
ARC common code to enable a SMP system + ISS provided SMP extensions. ARC700 natively lacks SMP support, hence some of the core features are are only enabled if SoCs have the necessary h/w pixie-dust. This includes: -Inter Processor Interrupts (IPI) -Cache coherency -load-locked/store-conditional ... The low level exception handling would be completely broken in SMP because we don't have hardware assisted stack switching. Thus a fair bit of this code is repurposing the MMU_SCRATCH reg for event handler prologues to keep them re-entrant. Many thanks to Rajeshwar Ranga for his initial "major" contributions to SMP Port (back in 2008), and to Noam Camus and Gilad Ben-Yossef for help with resurrecting that in 3.2 kernel (2012). Note that this platform code is again singleton design pattern - so multiple SMP platforms won't build at the moment - this deficiency is addressed in subsequent patches within this series. Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Rajeshwar Ranga <rajeshwar.ranga@gmail.com> Cc: Noam Camus <noamc@ezchip.com> Cc: Gilad Ben-Yossef <gilad@benyossef.com>
48 lines
1.1 KiB
Plaintext
48 lines
1.1 KiB
Plaintext
#
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# Copyright (C) 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License version 2 as
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# published by the Free Software Foundation.
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#
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if ARC_PLAT_FPGA_LEGACY
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choice
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prompt "FPGA Board"
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config ARC_BOARD_ANGEL4
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bool "ARC Angel4"
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select ISS_SMP_EXTN if SMP
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help
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ARC Angel4 FPGA Ref Platform (Xilinx Virtex Based)
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config ARC_BOARD_ML509
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bool "ML509"
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help
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ARC ML509 FPGA Ref Platform (Xilinx Virtex-5 Based)
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config ISS_SMP_EXTN
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bool "ARC SMP Extensions (ISS Models only)"
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default n
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depends on SMP
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select ARC_HAS_COH_RTSC
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help
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SMP Extensions to ARC700, in a "simulation only" Model, supported in
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ARC ISS (Instruction Set Simulator).
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The SMP extensions include:
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-IDU (Interrupt Distribution Unit)
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-XTL (To enable CPU start/stop/set-PC for another CPU)
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It doesn't provide coherent Caches and/or Atomic Ops (LLOCK/SCOND)
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endchoice
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config ARC_SERIAL_BAUD
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int "UART Baud rate"
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default "115200"
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depends on SERIAL_ARC || SERIAL_ARC_CONSOLE
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help
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Baud rate for the ARC UART
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endif
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