Sebastian Ott 414cbd1e3d s390/airq: provide cacheline aligned ivs
Provide the ability to create cachesize aligned interrupt vectors.
These will be used for per-CPU interrupt vectors.

Signed-off-by: Sebastian Ott <sebott@linux.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2019-04-29 10:47:01 +02:00
..
2019-04-29 10:47:01 +02:00
2019-03-18 18:34:45 -07:00