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Catalin Marinas 93dc68876b ARM: 7684/1: errata: Workaround for Cortex-A15 erratum 798181 (TLBI/DSB operations) 
On Cortex-A15 (r0p0..r3p2) the TLBI/DSB are not adequately shooting down
all use of the old entries. This patch implements the erratum workaround
which consists of:

1. Dummy TLBIMVAIS and DSB on the CPU doing the TLBI operation.
2. Send IPI to the CPUs that are running the same mm (and ASID) as the
   one being invalidated (or all the online CPUs for global pages).
3. CPU receiving the IPI executes a DMB and CLREX (part of the exception
   return code already).

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-03 16:45:49 +01:00
..
abort-ev4.S
ARM: entry: data abort: tail-call the main data abort handler
2011-07-02 10:56:11 +01:00
abort-ev4t.S
ARM: entry: data abort: tail-call the main data abort handler
2011-07-02 10:56:11 +01:00
abort-ev5t.S
ARM: entry: data abort: tail-call the main data abort handler
2011-07-02 10:56:11 +01:00
abort-ev5tj.S
ARM: entry: data abort: tail-call the main data abort handler
2011-07-02 10:56:11 +01:00
abort-ev6.S
ARM: 7396/1: errata: only handle ARM erratum #326103 on affected cores
2012-04-23 14:21:52 +01:00
abort-ev7.S
ARM: entry: data abort: tail-call the main data abort handler
2011-07-02 10:56:11 +01:00
abort-lv4t.S
ARM: entry: data abort: ensure r5 is preserved by abort functions
2011-07-02 10:56:12 +01:00
abort-macro.S
ARM: 7088/1: entry: fix wrong parameter name used in do_thumb_abort
2011-09-10 23:39:56 +01:00
abort-nommu.S
ARM: entry: data abort: tail-call the main data abort handler
2011-07-02 10:56:11 +01:00
alignment.c
ARM: fix scheduling while atomic warning in alignment handling code
2013-02-25 16:10:42 +00:00
cache-aurora-l2.h
ARM: 7547/4: cache-l2x0: add support for Aurora L2 cache ctrl
2012-11-06 19:47:35 +00:00
cache-fa.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
cache-feroceon-l2.c
ARM: move CP15 definitions to separate header file
2012-03-28 18:30:01 +01:00
cache-l2x0.c
ARM: 7682/1: cache-l2x0: fix masking of RTL revision numbering and set_debug init
2013-04-03 16:45:48 +01:00
cache-tauros2.c
ARM: cache: add dt support for tauros2 cache
2012-08-16 16:16:50 +08:00
cache-v3.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
cache-v4.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
cache-v4wb.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
cache-v4wt.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
cache-v6.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
cache-v7.S
arm: Add v7_invalidate_l1 to cache-v7.S
2013-02-11 19:37:24 -08:00
cache-xsc3l2.c
ARM: move CP15 definitions to separate header file
2012-03-28 18:30:01 +01:00
context.c
ARM: 7684/1: errata: Workaround for Cortex-A15 erratum 798181 (TLBI/DSB operations)
2013-04-03 16:45:49 +01:00
copypage-fa.c
arm: remove the second argument of k[un]map_atomic()
2012-03-20 21:48:14 +08:00
copypage-feroceon.c
arm: remove the second argument of k[un]map_atomic()
2012-03-20 21:48:14 +08:00
copypage-v4mc.c
Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm
2012-03-29 16:53:48 -07:00
copypage-v4wb.c
arm: remove the second argument of k[un]map_atomic()
2012-03-20 21:48:14 +08:00
copypage-v4wt.c
arm: remove the second argument of k[un]map_atomic()
2012-03-20 21:48:14 +08:00
copypage-v6.c
Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm
2012-03-29 16:53:48 -07:00
copypage-xsc3.c
arm: remove the second argument of k[un]map_atomic()
2012-03-20 21:48:14 +08:00
copypage-xscale.c
Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm
2012-03-29 16:53:48 -07:00
dma-mapping.c
ARM: DMA-mapping: add missing GFP_DMA flag for atomic buffer allocation
2013-03-14 09:25:19 +01:00
extable.c
…
fault-armv.c
mm: replace vma prio_tree with an interval tree
2012-10-09 16:22:39 +09:00
fault.c
readahead: fault retry breaks mmap file read random detection
2012-10-09 16:22:47 +09:00
fault.h
ARM: LPAE: Add fault handling support
2011-12-08 10:30:40 +00:00
flush.c
mm: replace vma prio_tree with an interval tree
2012-10-09 16:22:39 +09:00
fsr-2level.c
ARM: LPAE: Move the FSR definitions to separate files
2011-12-08 10:30:37 +00:00
fsr-3level.c
ARM: LPAE: Add fault handling support
2011-12-08 10:30:40 +00:00
highmem.c
Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm
2012-03-29 16:53:48 -07:00
idmap.c
ARM: 7661/1: mm: perform explicit branch predictor maintenance when required
2013-03-03 22:54:16 +00:00
init.c
ARM: Allow arm_memblock_steal() to remove memory from any RAM region
2012-08-13 00:22:28 +01:00
iomap.c
arm/PCI: remove arch pci_flags definition
2012-02-23 20:18:56 -07:00
ioremap.c
ARM: 7646/1: mm: use static_vm for managing static mapped areas
2013-02-16 17:54:22 +00:00
Kconfig
ARM: virt: hide CONFIG_ARM_VIRT_EXT from user
2013-01-10 21:09:33 +00:00
Makefile
ARM: 7644/1: vmregion: remove vmregion code entirely
2013-02-16 17:54:21 +00:00
mm.h
ARM: 7645/1: ioremap: introduce an infrastructure for static mapped area
2013-02-16 17:54:22 +00:00
mmap.c
Merge branch 'akpm' (Andrew's patchbomb)
2012-12-11 18:05:37 -08:00
mmu.c
ARM: 7677/1: LPAE: Fix mapping in alloc_init_section for unaligned addresses
2013-03-22 17:16:53 +00:00
nommu.c
ARM: 7383/1: nommu: populate vectors page from paging_init
2012-04-13 14:05:42 +01:00
pabort-legacy.S
ARM: entry: prefetch abort: tail-call the main prefetch abort handler
2011-07-02 10:56:10 +01:00
pabort-v6.S
ARM: entry: prefetch abort: tail-call the main prefetch abort handler
2011-07-02 10:56:10 +01:00
pabort-v7.S
ARM: entry: prefetch abort: tail-call the main prefetch abort handler
2011-07-02 10:56:10 +01:00
pgd.c
ARM: move CP15 definitions to separate header file
2012-03-28 18:30:01 +01:00
proc-arm7tdmi.S
ARM: proc-*.S: place cpu_reset functions into .idmap.text section
2011-12-06 14:04:14 +00:00
proc-arm9tdmi.S
ARM: proc-*.S: place cpu_reset functions into .idmap.text section
2011-12-06 14:04:14 +00:00
proc-arm720.S
ARM: proc-*.S: place cpu_reset functions into .idmap.text section
2011-12-06 14:04:14 +00:00
proc-arm740.S
ARM: proc-*.S: place cpu_reset functions into .idmap.text section
2011-12-06 14:04:14 +00:00
proc-arm920.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
proc-arm922.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
proc-arm925.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
proc-arm926.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
proc-arm940.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
proc-arm946.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
proc-arm1020.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
proc-arm1020e.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
proc-arm1022.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
proc-arm1026.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
proc-fa526.S
Disintegrate asm/system.h for ARM
2012-03-28 18:30:01 +01:00
proc-feroceon.S
ARM: 7542/1: mm: fix cache LoUIS API for xscale and feroceon
2012-09-28 21:09:50 +01:00
proc-macros.S
ARM: 7649/1: mm: mm->context.id fix for big-endian
2013-02-16 17:54:26 +00:00
proc-mohawk.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
proc-sa110.S
ARM: proc-*.S: place cpu_reset functions into .idmap.text section
2011-12-06 14:04:14 +00:00
proc-sa1100.S
ARM: proc-*.S: place cpu_reset functions into .idmap.text section
2011-12-06 14:04:14 +00:00
proc-syms.c
ARM: add size argument to __cpuc_flush_dcache_page
2009-12-14 14:53:22 +00:00
proc-v6.S
ARM: 7650/1: mm: replace direct access to mm->context.id with new macro
2013-02-16 17:54:27 +00:00
proc-v7-2level.S
ARM: 7650/1: mm: replace direct access to mm->context.id with new macro
2013-02-16 17:54:27 +00:00
proc-v7-3level.S
ARM: 7652/1: mm: fix missing use of 'asid' to get asid value from mm->context.id
2013-03-03 22:54:12 +00:00
proc-v7.S
ARM: 7678/1: Work around faulty ISAR0 register in some Krait CPUs
2013-03-22 17:16:56 +00:00
proc-xsc3.S
ARM: mm: implement LoUIS API for cache maintenance ops
2012-09-25 11:20:25 +01:00
proc-xscale.S
ARM: 7542/1: mm: fix cache LoUIS API for xscale and feroceon
2012-09-28 21:09:50 +01:00
tlb-fa.S
Merge branch 'devel-stable' into for-next
2011-07-22 23:09:07 +01:00
tlb-v4.S
ARM: mm: tlb-v4: Use the new processor struct macros
2011-07-07 15:31:12 +01:00
tlb-v4wb.S
ARM: mm: tlb-v4wb: Use the new processor struct macros
2011-07-07 15:31:12 +01:00
tlb-v4wbi.S
ARM: mm: tlb-v4wbi: Use the new processor struct macros
2011-07-07 15:31:12 +01:00
tlb-v6.S
Merge branch 'devel-stable' into for-next
2011-07-22 23:09:07 +01:00
tlb-v7.S
ARM: 7489/1: errata: fix workaround for erratum #720789 on UP systems
2012-08-11 09:16:00 +01:00