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Hersen Wu 41db5f1931 drm/amd/display: set-read link rate and lane count through debugfs

function description
 get/ set DP configuration: lane_count, link_rate, spread_spectrum

  valid lane count value: 1, 2, 4
  valid link rate value:
  06h = 1.62Gbps per lane
  0Ah = 2.7Gbps per lane
  0Ch = 3.24Gbps per lane
  14h = 5.4Gbps per lane
  1Eh = 8.1Gbps per lane

  debugfs is located at /sys/kernel/debug/dri/0/DP-x/link_settings

  --- to get dp configuration

  xxd -l 300 phy_settings

  It will list current, verified, reported, preferred dp configuration.
  current -- for current video mode
  verified --- maximum configuration which pass link training
  reported --- DP rx report caps (DPCD register offset 0, 1 2)
  preferred --- user force settings

  --- set (or force) dp configuration

  echo <lane_count>  <link_rate>

  for example, to force to  2 lane, 2.7GHz,
  echo 4 0xa > link_settings

  spread_spectrum could not be changed dynamically.

  in case invalid lane count, link rate are force, no hw programming will be
  done. please check link settings after force operation to see if HW get
  programming.

  xxd -l 300 link_settings

  check current and preferred settings.

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2018-07-13 14:47:45 -05:00

amdgpu_dm_color.c

drm/amd/display: get rid of 32.32 unsigned fixed point

2018-05-18 16:08:21 -05:00

amdgpu_dm_crc.c

drm/amd/display: Skip 2 frames when first reading CRC

2018-02-19 14:20:11 -05:00

amdgpu_dm_debugfs.c

drm/amd/display: set-read link rate and lane count through debugfs

2018-07-13 14:47:45 -05:00

amdgpu_dm_debugfs.h

drm/amd/display: Add front end for dp debugfs files