Thomas Bogendoerfer 43df4eb2fc MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDS ...

SB1250 uart bug is related to PASS 2 workarounds. Use config
CONFIG_SB1_PASS_2_WORKAROUNDS directly and get rid of SIBYTE_1956_WAR.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

2020-09-07 22:24:51 +02:00

..

cpu-feature-overrides.h

MIPS: octeon: Remove ARCH_HAS_IRQ_PER_CPU

2019-08-06 14:29:30 -07:00

irq.h

MIPS: Octeon: Remove forced mappings of USB interrupts.

2016-07-28 12:01:06 +02:00

kernel-entry-init.h

MIPS: Octeon: Enable KASLR

2017-01-03 16:34:35 +01:00

mangle-port.h

MIPS: io: fix sparse flood on asm/io.h

2020-06-25 10:36:39 +02:00

spaces.h

MIPS/OCTEON: Override default address space layout.

2013-06-21 18:07:02 +02:00

war.h

MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDS

2020-09-07 22:24:51 +02:00