44221ebae2
This is the SPI controller found on Marvel MMP2 and perhaps more platforms. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Mark Brown <broonie@kernel.org>
25 lines
737 B
Plaintext
25 lines
737 B
Plaintext
PXA2xx SSP SPI Controller
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Required properties:
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- compatible: Must be "marvell,mmp2-ssp".
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- reg: Offset and length of the device's register set.
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- interrupts: Should be the interrupt number.
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- clocks: Should contain a single entry describing the clock input.
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- #address-cells: Number of cells required to define a chip select address.
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- #size-cells: Should be zero.
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Optional properties:
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- cs-gpios: list of GPIO chip selects. See the SPI bus bindings,
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Documentation/devicetree/bindings/spi/spi-bus.txt
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Child nodes represent devices on the SPI bus
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See ../spi/spi-bus.txt
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Example:
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ssp1: spi@d4035000 {
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compatible = "marvell,mmp2-ssp";
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reg = <0xd4035000 0x1000>;
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clocks = <&soc_clocks MMP2_CLK_SSP0>;
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interrupts = <0>;
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};
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