Vitaly Wool 44c9225729 RISC-V: enable XIP ... Introduce XIP (eXecute In Place) support for RISC-V platforms. It allows code to be executed directly from non-volatile storage directly addressable by the CPU, such as QSPI NOR flash which can be found on many RISC-V platforms. This makes way for significant optimization of RAM footprint. The XIP kernel is not compressed since it has to run directly from flash, so it will occupy more space on the non-volatile storage. The physical flash address used to link the kernel object files and for storing it has to be known at compile time and is represented by a Kconfig option. XIP on RISC-V will for the time being only work on MMU-enabled kernels. Signed-off-by: Vitaly Wool <vitaly.wool@konsulko.com> [Alex: Rebase on top of "Move kernel mapping outside the linear mapping" ] Signed-off-by: Alexandre Ghiti <alex@ghiti.fr> [Palmer: disable XIP for allyesconfig] Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>		2021-04-26 08:31:28 -07:00
..
boot	RISC-V: enable XIP	2021-04-26 08:31:28 -07:00
configs	RISC-V: Enable CPU Hotplug in defconfigs	2021-02-26 21:24:02 -08:00
errata	riscv: sifive: Apply errata "cip-1200" patch	2021-04-26 08:24:58 -07:00
include	RISC-V: enable XIP	2021-04-26 08:31:28 -07:00
kernel	RISC-V: enable XIP	2021-04-26 08:31:28 -07:00
lib	riscv: Add support for function error injection	2021-01-14 15:09:09 -08:00
mm	RISC-V: enable XIP	2021-04-26 08:31:28 -07:00
net	riscv: bpf: Avoid breaking W^X	2021-04-26 08:25:14 -07:00
Kbuild	riscv: Allow device trees to be built into the kernel	2020-05-18 11:38:05 -07:00
Kconfig	RISC-V: enable XIP	2021-04-26 08:31:28 -07:00
Kconfig.debug	RISC-V: Remove EARLY_PRINTK support	2018-12-17 10:23:46 -08:00
Kconfig.erratas	riscv: sifive: Apply errata "cip-1200" patch	2021-04-26 08:24:58 -07:00
Kconfig.socs	riscv: sifive: Add SiFive alternative ports	2021-04-26 08:24:56 -07:00
Makefile	RISC-V: enable XIP	2021-04-26 08:31:28 -07:00