1a59d1b8e0
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1334 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.113240726@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
165 lines
3.5 KiB
C
165 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* arch/arm/mach-ks8695/irq.c
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*
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* Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
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* Copyright (C) 2006 Simtec Electronics
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <asm/mach/irq.h>
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#include <mach/regs-irq.h>
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#include <mach/regs-gpio.h>
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static void ks8695_irq_mask(struct irq_data *d)
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{
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unsigned long inten;
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inten = __raw_readl(KS8695_IRQ_VA + KS8695_INTEN);
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inten &= ~(1 << d->irq);
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__raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN);
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}
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static void ks8695_irq_unmask(struct irq_data *d)
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{
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unsigned long inten;
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inten = __raw_readl(KS8695_IRQ_VA + KS8695_INTEN);
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inten |= (1 << d->irq);
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__raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN);
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}
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static void ks8695_irq_ack(struct irq_data *d)
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{
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__raw_writel((1 << d->irq), KS8695_IRQ_VA + KS8695_INTST);
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}
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static struct irq_chip ks8695_irq_level_chip;
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static struct irq_chip ks8695_irq_edge_chip;
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static int ks8695_irq_set_type(struct irq_data *d, unsigned int type)
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{
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unsigned long ctrl, mode;
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unsigned short level_triggered = 0;
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ctrl = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC);
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switch (type) {
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case IRQ_TYPE_LEVEL_HIGH:
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mode = IOPC_TM_HIGH;
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level_triggered = 1;
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break;
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case IRQ_TYPE_LEVEL_LOW:
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mode = IOPC_TM_LOW;
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level_triggered = 1;
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break;
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case IRQ_TYPE_EDGE_RISING:
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mode = IOPC_TM_RISING;
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break;
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case IRQ_TYPE_EDGE_FALLING:
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mode = IOPC_TM_FALLING;
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break;
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case IRQ_TYPE_EDGE_BOTH:
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mode = IOPC_TM_EDGE;
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break;
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default:
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return -EINVAL;
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}
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switch (d->irq) {
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case KS8695_IRQ_EXTERN0:
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ctrl &= ~IOPC_IOEINT0TM;
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ctrl |= IOPC_IOEINT0_MODE(mode);
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break;
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case KS8695_IRQ_EXTERN1:
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ctrl &= ~IOPC_IOEINT1TM;
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ctrl |= IOPC_IOEINT1_MODE(mode);
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break;
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case KS8695_IRQ_EXTERN2:
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ctrl &= ~IOPC_IOEINT2TM;
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ctrl |= IOPC_IOEINT2_MODE(mode);
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break;
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case KS8695_IRQ_EXTERN3:
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ctrl &= ~IOPC_IOEINT3TM;
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ctrl |= IOPC_IOEINT3_MODE(mode);
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break;
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default:
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return -EINVAL;
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}
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if (level_triggered) {
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irq_set_chip_and_handler(d->irq, &ks8695_irq_level_chip,
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handle_level_irq);
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}
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else {
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irq_set_chip_and_handler(d->irq, &ks8695_irq_edge_chip,
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handle_edge_irq);
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}
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__raw_writel(ctrl, KS8695_GPIO_VA + KS8695_IOPC);
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return 0;
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}
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static struct irq_chip ks8695_irq_level_chip = {
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.irq_ack = ks8695_irq_mask,
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.irq_mask = ks8695_irq_mask,
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.irq_unmask = ks8695_irq_unmask,
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.irq_set_type = ks8695_irq_set_type,
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};
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static struct irq_chip ks8695_irq_edge_chip = {
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.irq_ack = ks8695_irq_ack,
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.irq_mask = ks8695_irq_mask,
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.irq_unmask = ks8695_irq_unmask,
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.irq_set_type = ks8695_irq_set_type,
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};
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void __init ks8695_init_irq(void)
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{
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unsigned int irq;
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/* Disable all interrupts initially */
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__raw_writel(0, KS8695_IRQ_VA + KS8695_INTMC);
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__raw_writel(0, KS8695_IRQ_VA + KS8695_INTEN);
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for (irq = 0; irq < NR_IRQS; irq++) {
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switch (irq) {
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/* Level-triggered interrupts */
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case KS8695_IRQ_BUS_ERROR:
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case KS8695_IRQ_UART_MODEM_STATUS:
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case KS8695_IRQ_UART_LINE_STATUS:
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case KS8695_IRQ_UART_RX:
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case KS8695_IRQ_COMM_TX:
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case KS8695_IRQ_COMM_RX:
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irq_set_chip_and_handler(irq,
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&ks8695_irq_level_chip,
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handle_level_irq);
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break;
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/* Edge-triggered interrupts */
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default:
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/* clear pending bit */
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ks8695_irq_ack(irq_get_irq_data(irq));
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irq_set_chip_and_handler(irq,
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&ks8695_irq_edge_chip,
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handle_edge_irq);
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}
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irq_clear_status_flags(irq, IRQ_NOREQUEST);
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}
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}
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