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Freescale PCIe controllers on their PCIe Root Ports do not have any mappable PCI BAR allocate from PCIe MEM. Information about 1MB window on BAR0 of PCIe Root Port was misleading because Freescale PCIe controllers have at BAR0 position different register PEXCSRBAR, and kernel correctly skipts BAR0 for these Freescale PCIe Root Ports. So update comment about P2020 PCIe Root Port and decrease PCIe MEM size required for PCIe controller (pci2 node) on which is on-board xHCI controller. lspci confirms that on P2020 PCIe Root Port is no PCI BAR and /proc/iomem sees that only c0000000-c000ffff and c0010000-c0011fff ranges are used. Fixes: 54c15ec3b738 ("powerpc: dts: Add DTS file for CZ.NIC Turris 1.x routers") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20230505172818.18416-1-pali@kernel.org
To extract the kernel vmlinux, System.map, .config or initrd from the zImage binary: objcopy -j .kernel:vmlinux -O binary zImage vmlinux.gz objcopy -j .kernel:System.map -O binary zImage System.map.gz objcopy -j .kernel:.config -O binary zImage config.gz objcopy -j .kernel:initrd -O binary zImage.initrd initrd.gz Peter