Roman Beranek 4795c78768

drm: sun4i: calculate proper DCLK rate for DSI ...

In DSI mode, TCON0's data clock is required to run at 1/4 the per-lane
bit rate.

Signed-off-by: Roman Beranek <me@crly.cz>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20230505052110.67514-5-me@crly.cz

2023-05-10 16:03:19 +02:00

..

drm

drm: sun4i: calculate proper DCLK rate for DSI

2023-05-10 16:03:19 +02:00

host1x

drm/tegra: Changes for v6.4-rc1

2023-04-06 15:02:17 +02:00

ipu-v3

drm: Drop ARCH_MULTIPLATFORM from dependencies

2023-03-14 12:57:22 +01:00

trace

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vga

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Makefile

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