Paul Cercueil 1660710cf5 MIPS: mm: XBurst CPU requires sync after DMA
I am not sure why this is required, but if this is not enabled, reading
from a buffer in which data has been DMA'd may read incorrect values.

This used to happen for instance in mmc_app_send_scr()
(drivers/mmc/core/sd_ops.c), where data is DMA'd to a buffer then copied
by the CPU to a different location.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-06-01 11:44:46 +02:00
..
2020-04-19 16:13:18 +02:00
2017-02-02 15:06:26 +00:00