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linux/drivers/clk/sunxi-ng
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Icenowy Zheng 98fb2b95d2 clk: sunxi-ng: enable so-said LDOs for A33 SoC's pll-mipi clock 
In the user manual of A33 SoC, the bit 22 and 23 of pll-mipi control
register is called "LDO{1,2}_EN", and according to the BSP source code
from Allwinner [1], the LDOs are enabled during the clock's enabling
process.

The clock failed to generate output if the two LDOs are not enabled.

Add the two bits to the clock's gate bits, so that the LDOs are enabled
when the PLL is enabled.

[1] https://github.com/allwinner-zh/linux-3.4-sunxi/blob/master/drivers/clk/sunxi/clk-sun8iw5.c#L429

Fixes: d05c748bd7 ("clk: sunxi-ng: Add A33 CCU support")
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-11-23 12:32:39 -08:00
..
ccu_common.c clk: sunxi-ng: Fix inverted test condition in ccu_helper_wait_for_lock 2016-08-08 19:27:33 +02:00
ccu_common.h
ccu_div.c clk: sunxi-ng: Add divider 2016-07-08 18:04:48 -07:00
ccu_div.h clk: sunxi-ng: div: Allow to set a maximum 2016-09-10 11:41:18 +02:00
ccu_frac.c
ccu_frac.h
ccu_gate.c clk: sunxi-ng: Add gate clock support 2016-07-08 18:04:38 -07:00
ccu_gate.h clk: sunxi-ng: Add gate clock support 2016-07-08 18:04:38 -07:00
ccu_mp.c clk: sunxi-ng: div: Allow to set a maximum 2016-09-10 11:41:18 +02:00
ccu_mp.h clk: sunxi-ng: mux: Rename mux macro to be consistent 2016-08-25 22:25:53 +02:00
ccu_mult.c clk: sunxi-ng: Add N-class clocks support 2016-09-10 11:41:19 +02:00
ccu_mult.h clk: sunxi-ng: Add N-class clocks support 2016-09-10 11:41:19 +02:00
ccu_mux.c clk: sunxi-ng: mux: Add clk notifier functions 2016-08-25 22:30:36 +02:00
ccu_mux.h clk: sunxi-ng: mux: Add mux table macro 2016-09-10 11:41:18 +02:00
ccu_nk.c clk: sunxi-ng: nk: Make ccu_nk_find_best static 2016-08-08 19:27:33 +02:00
ccu_nk.h clk: sunxi-ng: Add N-K-factor clock support 2016-07-08 18:04:56 -07:00
ccu_nkm.c clk: sunxi-ng: div: Allow to set a maximum 2016-09-10 11:41:18 +02:00
ccu_nkm.h clk: sunxi-ng: mux: Rename mux macro to be consistent 2016-08-25 22:25:53 +02:00
ccu_nkmp.c clk: sunxi-ng: div: Allow to set a maximum 2016-09-10 11:41:18 +02:00
ccu_nkmp.h clk: sunxi-ng: Add N-K-M-P factor clock 2016-07-08 18:05:06 -07:00
ccu_nm.c clk: sunxi-ng: div: Allow to set a maximum 2016-09-10 11:41:18 +02:00
ccu_nm.h clk: sunxi-ng: Add N-M-factor clock support 2016-07-08 18:05:00 -07:00
ccu_phase.c clk: sunxi-ng: Add phase clock support 2016-07-08 18:04:45 -07:00
ccu_phase.h clk: sunxi-ng: Add phase clock support 2016-07-08 18:04:45 -07:00
ccu_reset.c
ccu_reset.h
ccu-sun6i-a31.c clk: sunxi-ng: sun6i-a31: Enable PLL-MIPI LDOs when ungating it 2016-11-21 19:50:49 +01:00
ccu-sun6i-a31.h clk: sunxi-ng: Add A31/A31s clocks 2016-08-25 22:31:43 +02:00
ccu-sun8i-a23-a33.h clk: sunxi-ng: Add A33 CCU support 2016-09-10 11:41:19 +02:00
ccu-sun8i-a23.c clk: sunxi-ng: Fix reset offset for the A23 and A33 2016-09-20 17:04:31 -07:00
ccu-sun8i-a33.c clk: sunxi-ng: enable so-said LDOs for A33 SoC's pll-mipi clock 2016-11-23 12:32:39 -08:00
ccu-sun8i-h3.c Allwinner Clock changes for 4.9 2016-09-14 11:10:15 -07:00
ccu-sun8i-h3.h clk: sunxi-ng: Add H3 clocks 2016-07-08 18:05:12 -07:00
Kconfig clk: sunxi-ng: Add hardware dependency 2016-09-10 11:41:21 +02:00
Makefile clk: sunxi-ng: Add A23 CCU 2016-09-10 11:41:20 +02:00