48fe583fe5
This patch adds support for the amlogic GXL cryptographic offloader present on GXL SoCs. This driver supports AES cipher in CBC/ECB mode. Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
382 lines
10 KiB
C
382 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* amlogic-cipher.c - hardware cryptographic offloader for Amlogic GXL SoC
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*
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* Copyright (C) 2018-2019 Corentin LABBE <clabbe@baylibre.com>
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*
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* This file add support for AES cipher with 128,192,256 bits keysize in
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* CBC and ECB mode.
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*/
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#include <linux/crypto.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <crypto/scatterwalk.h>
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#include <linux/scatterlist.h>
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#include <linux/dma-mapping.h>
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#include <crypto/internal/skcipher.h>
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#include "amlogic-gxl.h"
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static int get_engine_number(struct meson_dev *mc)
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{
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return atomic_inc_return(&mc->flow) % MAXFLOW;
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}
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static bool meson_cipher_need_fallback(struct skcipher_request *areq)
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{
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struct scatterlist *src_sg = areq->src;
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struct scatterlist *dst_sg = areq->dst;
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if (areq->cryptlen == 0)
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return true;
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if (sg_nents(src_sg) != sg_nents(dst_sg))
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return true;
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/* KEY/IV descriptors use 3 desc */
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if (sg_nents(src_sg) > MAXDESC - 3 || sg_nents(dst_sg) > MAXDESC - 3)
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return true;
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while (src_sg && dst_sg) {
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if ((src_sg->length % 16) != 0)
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return true;
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if ((dst_sg->length % 16) != 0)
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return true;
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if (src_sg->length != dst_sg->length)
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return true;
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if (!IS_ALIGNED(src_sg->offset, sizeof(u32)))
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return true;
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if (!IS_ALIGNED(dst_sg->offset, sizeof(u32)))
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return true;
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src_sg = sg_next(src_sg);
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dst_sg = sg_next(dst_sg);
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}
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return false;
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}
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static int meson_cipher_do_fallback(struct skcipher_request *areq)
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{
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struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
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struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
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struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq);
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int err;
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#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
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struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
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struct meson_alg_template *algt;
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#endif
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SYNC_SKCIPHER_REQUEST_ON_STACK(req, op->fallback_tfm);
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#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
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algt = container_of(alg, struct meson_alg_template, alg.skcipher);
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algt->stat_fb++;
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#endif
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skcipher_request_set_sync_tfm(req, op->fallback_tfm);
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skcipher_request_set_callback(req, areq->base.flags, NULL, NULL);
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skcipher_request_set_crypt(req, areq->src, areq->dst,
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areq->cryptlen, areq->iv);
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if (rctx->op_dir == MESON_DECRYPT)
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err = crypto_skcipher_decrypt(req);
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else
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err = crypto_skcipher_encrypt(req);
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skcipher_request_zero(req);
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return err;
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}
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static int meson_cipher(struct skcipher_request *areq)
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{
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struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
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struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
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struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq);
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struct meson_dev *mc = op->mc;
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struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
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struct meson_alg_template *algt;
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int flow = rctx->flow;
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unsigned int todo, eat, len;
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struct scatterlist *src_sg = areq->src;
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struct scatterlist *dst_sg = areq->dst;
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struct meson_desc *desc;
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int nr_sgs, nr_sgd;
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int i, err = 0;
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unsigned int keyivlen, ivsize, offset, tloffset;
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dma_addr_t phykeyiv;
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void *backup_iv = NULL, *bkeyiv;
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algt = container_of(alg, struct meson_alg_template, alg.skcipher);
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dev_dbg(mc->dev, "%s %s %u %x IV(%u) key=%u flow=%d\n", __func__,
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crypto_tfm_alg_name(areq->base.tfm),
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areq->cryptlen,
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rctx->op_dir, crypto_skcipher_ivsize(tfm),
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op->keylen, flow);
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#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
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algt->stat_req++;
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mc->chanlist[flow].stat_req++;
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#endif
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/*
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* The hardware expect a list of meson_desc structures.
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* The 2 first structures store key
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* The third stores IV
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*/
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bkeyiv = kzalloc(48, GFP_KERNEL | GFP_DMA);
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if (!bkeyiv)
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return -ENOMEM;
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memcpy(bkeyiv, op->key, op->keylen);
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keyivlen = op->keylen;
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ivsize = crypto_skcipher_ivsize(tfm);
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if (areq->iv && ivsize > 0) {
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if (ivsize > areq->cryptlen) {
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dev_err(mc->dev, "invalid ivsize=%d vs len=%d\n", ivsize, areq->cryptlen);
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return -EINVAL;
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}
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memcpy(bkeyiv + 32, areq->iv, ivsize);
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keyivlen = 48;
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if (rctx->op_dir == MESON_DECRYPT) {
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backup_iv = kzalloc(ivsize, GFP_KERNEL);
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if (!backup_iv) {
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err = -ENOMEM;
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goto theend;
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}
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offset = areq->cryptlen - ivsize;
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scatterwalk_map_and_copy(backup_iv, areq->src, offset,
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ivsize, 0);
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}
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}
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if (keyivlen == 24)
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keyivlen = 32;
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phykeyiv = dma_map_single(mc->dev, bkeyiv, keyivlen,
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DMA_TO_DEVICE);
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if (dma_mapping_error(mc->dev, phykeyiv)) {
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dev_err(mc->dev, "Cannot DMA MAP KEY IV\n");
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return -EFAULT;
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}
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tloffset = 0;
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eat = 0;
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i = 0;
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while (keyivlen > eat) {
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desc = &mc->chanlist[flow].tl[tloffset];
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memset(desc, 0, sizeof(struct meson_desc));
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todo = min(keyivlen - eat, 16u);
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desc->t_src = phykeyiv + i * 16;
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desc->t_dst = i * 16;
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desc->len = 16;
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desc->mode = MODE_KEY;
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desc->owner = 1;
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eat += todo;
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i++;
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tloffset++;
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}
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if (areq->src == areq->dst) {
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nr_sgs = dma_map_sg(mc->dev, areq->src, sg_nents(areq->src),
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DMA_BIDIRECTIONAL);
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if (nr_sgs < 0) {
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dev_err(mc->dev, "Invalid SG count %d\n", nr_sgs);
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err = -EINVAL;
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goto theend;
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}
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nr_sgd = nr_sgs;
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} else {
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nr_sgs = dma_map_sg(mc->dev, areq->src, sg_nents(areq->src),
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DMA_TO_DEVICE);
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if (nr_sgs < 0 || nr_sgs > MAXDESC - 3) {
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dev_err(mc->dev, "Invalid SG count %d\n", nr_sgs);
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err = -EINVAL;
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goto theend;
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}
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nr_sgd = dma_map_sg(mc->dev, areq->dst, sg_nents(areq->dst),
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DMA_FROM_DEVICE);
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if (nr_sgd < 0 || nr_sgd > MAXDESC - 3) {
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dev_err(mc->dev, "Invalid SG count %d\n", nr_sgd);
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err = -EINVAL;
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goto theend;
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}
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}
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src_sg = areq->src;
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dst_sg = areq->dst;
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len = areq->cryptlen;
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while (src_sg) {
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desc = &mc->chanlist[flow].tl[tloffset];
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memset(desc, 0, sizeof(struct meson_desc));
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desc->t_src = sg_dma_address(src_sg);
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desc->t_dst = sg_dma_address(dst_sg);
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todo = min(len, sg_dma_len(src_sg));
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desc->owner = 1;
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desc->len = todo;
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desc->mode = op->keymode;
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desc->op_mode = algt->blockmode;
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desc->enc = rctx->op_dir;
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len -= todo;
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if (!sg_next(src_sg))
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desc->eoc = 1;
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tloffset++;
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src_sg = sg_next(src_sg);
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dst_sg = sg_next(dst_sg);
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}
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reinit_completion(&mc->chanlist[flow].complete);
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mc->chanlist[flow].status = 0;
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writel(mc->chanlist[flow].t_phy | 2, mc->base + (flow << 2));
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wait_for_completion_interruptible_timeout(&mc->chanlist[flow].complete,
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msecs_to_jiffies(500));
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if (mc->chanlist[flow].status == 0) {
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dev_err(mc->dev, "DMA timeout for flow %d\n", flow);
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err = -EINVAL;
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}
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dma_unmap_single(mc->dev, phykeyiv, keyivlen, DMA_TO_DEVICE);
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if (areq->src == areq->dst) {
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dma_unmap_sg(mc->dev, areq->src, nr_sgs, DMA_BIDIRECTIONAL);
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} else {
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dma_unmap_sg(mc->dev, areq->src, nr_sgs, DMA_TO_DEVICE);
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dma_unmap_sg(mc->dev, areq->dst, nr_sgd, DMA_FROM_DEVICE);
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}
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if (areq->iv && ivsize > 0) {
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if (rctx->op_dir == MESON_DECRYPT) {
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memcpy(areq->iv, backup_iv, ivsize);
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kzfree(backup_iv);
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} else {
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scatterwalk_map_and_copy(areq->iv, areq->dst,
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areq->cryptlen - ivsize,
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ivsize, 0);
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}
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}
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theend:
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kzfree(bkeyiv);
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return err;
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}
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static int meson_handle_cipher_request(struct crypto_engine *engine,
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void *areq)
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{
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int err;
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struct skcipher_request *breq = container_of(areq, struct skcipher_request, base);
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err = meson_cipher(breq);
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crypto_finalize_skcipher_request(engine, breq, err);
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return 0;
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}
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int meson_skdecrypt(struct skcipher_request *areq)
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{
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struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
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struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
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struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq);
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struct crypto_engine *engine;
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int e;
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rctx->op_dir = MESON_DECRYPT;
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if (meson_cipher_need_fallback(areq))
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return meson_cipher_do_fallback(areq);
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e = get_engine_number(op->mc);
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engine = op->mc->chanlist[e].engine;
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rctx->flow = e;
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return crypto_transfer_skcipher_request_to_engine(engine, areq);
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}
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int meson_skencrypt(struct skcipher_request *areq)
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{
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struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
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struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
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struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq);
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struct crypto_engine *engine;
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int e;
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rctx->op_dir = MESON_ENCRYPT;
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if (meson_cipher_need_fallback(areq))
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return meson_cipher_do_fallback(areq);
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e = get_engine_number(op->mc);
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engine = op->mc->chanlist[e].engine;
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rctx->flow = e;
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return crypto_transfer_skcipher_request_to_engine(engine, areq);
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}
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int meson_cipher_init(struct crypto_tfm *tfm)
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{
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struct meson_cipher_tfm_ctx *op = crypto_tfm_ctx(tfm);
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struct meson_alg_template *algt;
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const char *name = crypto_tfm_alg_name(tfm);
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struct crypto_skcipher *sktfm = __crypto_skcipher_cast(tfm);
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struct skcipher_alg *alg = crypto_skcipher_alg(sktfm);
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memset(op, 0, sizeof(struct meson_cipher_tfm_ctx));
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algt = container_of(alg, struct meson_alg_template, alg.skcipher);
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op->mc = algt->mc;
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sktfm->reqsize = sizeof(struct meson_cipher_req_ctx);
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op->fallback_tfm = crypto_alloc_sync_skcipher(name, 0, CRYPTO_ALG_NEED_FALLBACK);
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if (IS_ERR(op->fallback_tfm)) {
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dev_err(op->mc->dev, "ERROR: Cannot allocate fallback for %s %ld\n",
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name, PTR_ERR(op->fallback_tfm));
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return PTR_ERR(op->fallback_tfm);
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}
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op->enginectx.op.do_one_request = meson_handle_cipher_request;
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op->enginectx.op.prepare_request = NULL;
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op->enginectx.op.unprepare_request = NULL;
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return 0;
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}
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void meson_cipher_exit(struct crypto_tfm *tfm)
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{
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struct meson_cipher_tfm_ctx *op = crypto_tfm_ctx(tfm);
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if (op->key) {
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memzero_explicit(op->key, op->keylen);
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kfree(op->key);
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}
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crypto_free_sync_skcipher(op->fallback_tfm);
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}
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int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,
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unsigned int keylen)
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{
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struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
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struct meson_dev *mc = op->mc;
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switch (keylen) {
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case 128 / 8:
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op->keymode = MODE_AES_128;
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break;
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case 192 / 8:
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op->keymode = MODE_AES_192;
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break;
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case 256 / 8:
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op->keymode = MODE_AES_256;
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break;
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default:
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dev_dbg(mc->dev, "ERROR: Invalid keylen %u\n", keylen);
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crypto_skcipher_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
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return -EINVAL;
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}
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if (op->key) {
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memzero_explicit(op->key, op->keylen);
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kfree(op->key);
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}
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op->keylen = keylen;
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op->key = kmalloc(keylen, GFP_KERNEL | GFP_DMA);
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if (!op->key)
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return -ENOMEM;
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memcpy(op->key, key, keylen);
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return crypto_sync_skcipher_setkey(op->fallback_tfm, key, keylen);
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}
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