a34506e08d
* Add support for flash reset using the dt reset-gpios property. * Update hwcaps.mask to include 8D-8D-8D read and page program ops when xSPI profile 1.0 table is defined. * Bypass zero erase size in spi_nor_find_best_erase_type(). * Fix select_uniform_erase to skip 0 erase size * Add generic flash driver. If a flash is not found in the flash_info array, fall back to the generic flash driver which is described solely by the flash's SFDP tables. * Fix the number of bytes for the dummy cycles in spi_nor_spimem_check_readop(). * Introduce SPI_NOR_QUAD_PP flag, as PP_1_1_4 is not SFDP discoverable. SPI NOR manufacturer drivers changes: * Spansion: - use PARSE_SFDP for s28hs512t, - add support for s28hl512t, s28hl01gt, and s28hs01gt. * Gigadevice: Replace default_init() with post_bfpt() for gd25q256. * Micron - ST: Enable locking for mt25qu256a. * Winbond: Add support for W25Q512NW-IQ. * ISSI: Use PARSE_SFDP and SPI_NOR_QUAD_PP. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEHUIqys8OyG1eHf7fS1VPR6WNFOkFAmOJ59AACgkQS1VPR6WN FOnzOQf/WLBTNFtPcJoS7cdjlh4fuGySDUKuLifOX+Tmk/ki3XFCZR98cESgb5m+ hCyFDeER/qfdOK9ObT3K1GBS6x7zx8YkskbucjAU0vlIsr2ZHCjNpNiAHrADsKjR 579N0Xwh2ibh7uVJ1xvsPwObdAc8P/tjGHHWF6hGEZzIPYXJVce+qDktkkLfbZ/P Fik6+y3h68wW/0kDNt/gNmNcb5Z3fjxySs21Np5sy7bUtVVBjHWLo0OpjNadDH9M m6AkhFA5h9OVl5E4jHBpxc4NvlAa5f6520vESpieseNJiIMWo0W/eSkVsframFew ILdtXCHjkbS6kgvSpUViobMFsgCjaA== =Yi2q -----END PGP SIGNATURE----- Merge tag 'spi-nor/for-6.2' into mtd/next SPI NOR core changes: * Add support for flash reset using the dt reset-gpios property. * Update hwcaps.mask to include 8D-8D-8D read and page program ops when xSPI profile 1.0 table is defined. * Bypass zero erase size in spi_nor_find_best_erase_type(). * Fix select_uniform_erase to skip 0 erase size * Add generic flash driver. If a flash is not found in the flash_info array, fall back to the generic flash driver which is described solely by the flash's SFDP tables. * Fix the number of bytes for the dummy cycles in spi_nor_spimem_check_readop(). * Introduce SPI_NOR_QUAD_PP flag, as PP_1_1_4 is not SFDP discoverable. SPI NOR manufacturer drivers changes: * Spansion: - use PARSE_SFDP for s28hs512t, - add support for s28hl512t, s28hl01gt, and s28hs01gt. * Gigadevice: Replace default_init() with post_bfpt() for gd25q256. * Micron - ST: Enable locking for mt25qu256a. * Winbond: Add support for W25Q512NW-IQ. * ISSI: Use PARSE_SFDP and SPI_NOR_QUAD_PP. Fix merge conflict in the jedec,spi-nor bindings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
97 lines
3.1 KiB
YAML
97 lines
3.1 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mtd/jedec,spi-nor.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: SPI NOR flash ST M25Pxx (and similar) serial flash chips
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maintainers:
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- Rob Herring <robh@kernel.org>
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allOf:
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- $ref: "mtd.yaml#"
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- $ref: /schemas/spi/spi-peripheral-props.yaml#
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properties:
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compatible:
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oneOf:
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- items:
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- pattern: "^((((micron|spansion|st),)?\
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(m25p(40|80|16|32|64|128)|\
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n25q(32b|064|128a11|128a13|256a|512a|164k)))|\
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atmel,at25df(321a|641|081a)|\
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everspin,mr25h(10|40|128|256)|\
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(mxicy|macronix),mx25l(4005a|1606e|6405d|8005|12805d|25635e)|\
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(mxicy|macronix),mx25u(4033|4035)|\
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(spansion,)?s25fl(128s|256s1|512s|008k|064k|164k)|\
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(sst|microchip),sst25vf(016b|032b|040b)|\
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(sst,)?sst26wf016b|\
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(sst,)?sst25wf(040b|080)|\
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winbond,w25x(80|32)|\
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(winbond,)?w25q(16|32(w|dw)?|64(dw)?|80bl|128(fw)?|256))$"
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- const: jedec,spi-nor
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- items:
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- enum:
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- issi,is25lp016d
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- micron,mt25qu02g
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- mxicy,mx25r1635f
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- mxicy,mx25u6435f
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- mxicy,mx25v8035f
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- spansion,s25sl12801
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- spansion,s25fs512s
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- const: jedec,spi-nor
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- const: jedec,spi-nor
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description:
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Must also include "jedec,spi-nor" for any SPI NOR flash that can be
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identified by the JEDEC READ ID opcode (0x9F).
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reg:
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minItems: 1
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maxItems: 2
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m25p,fast-read:
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type: boolean
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description:
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Use the "fast read" opcode to read data from the chip instead of the usual
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"read" opcode. This opcode is not supported by all chips and support for
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it can not be detected at runtime. Refer to your chips' datasheet to check
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if this is supported by your chip.
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broken-flash-reset:
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type: boolean
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description:
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Some flash devices utilize stateful addressing modes (e.g., for 32-bit
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addressing) which need to be managed carefully by a system. Because these
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sorts of flash don't have a standardized software reset command, and
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because some systems don't toggle the flash RESET# pin upon system reset
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(if the pin even exists at all), there are systems which cannot reboot
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properly if the flash is left in the "wrong" state. This boolean flag can
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be used on such systems, to denote the absence of a reliable reset
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mechanism.
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reset-gpios:
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description:
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A GPIO line connected to the RESET (active low) signal of the device.
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If "broken-flash-reset" is present then having this property does not
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make any difference.
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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flash@0 {
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compatible = "spansion,m25p80", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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m25p,fast-read;
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reset-gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
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};
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};
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...
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