Miquel Raynal a34506e08d SPI NOR core changes:
* Add support for flash reset using the dt reset-gpios property.
 * Update hwcaps.mask to include 8D-8D-8D read and page program ops
   when xSPI profile 1.0 table is defined.
 * Bypass zero erase size in spi_nor_find_best_erase_type().
 * Fix select_uniform_erase to skip 0 erase size
 * Add generic flash driver. If a flash is not found in the flash_info
   array, fall back to the generic flash driver which is described solely
   by the flash's SFDP tables.
 * Fix the number of bytes for the dummy cycles in
   spi_nor_spimem_check_readop().
 * Introduce SPI_NOR_QUAD_PP flag, as PP_1_1_4 is not SFDP discoverable.
 
 SPI NOR manufacturer drivers changes:
 * Spansion:
   - use PARSE_SFDP for s28hs512t,
   - add support for s28hl512t, s28hl01gt, and s28hs01gt.
 * Gigadevice: Replace default_init() with post_bfpt() for gd25q256.
 * Micron - ST: Enable locking for mt25qu256a.
 * Winbond: Add support for W25Q512NW-IQ.
 * ISSI: Use PARSE_SFDP and SPI_NOR_QUAD_PP.
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Merge tag 'spi-nor/for-6.2' into mtd/next

SPI NOR core changes:
* Add support for flash reset using the dt reset-gpios property.
* Update hwcaps.mask to include 8D-8D-8D read and page program ops
  when xSPI profile 1.0 table is defined.
* Bypass zero erase size in spi_nor_find_best_erase_type().
* Fix select_uniform_erase to skip 0 erase size
* Add generic flash driver. If a flash is not found in the flash_info
  array, fall back to the generic flash driver which is described solely
  by the flash's SFDP tables.
* Fix the number of bytes for the dummy cycles in
  spi_nor_spimem_check_readop().
* Introduce SPI_NOR_QUAD_PP flag, as PP_1_1_4 is not SFDP discoverable.

SPI NOR manufacturer drivers changes:
* Spansion:
  - use PARSE_SFDP for s28hs512t,
  - add support for s28hl512t, s28hl01gt, and s28hs01gt.
* Gigadevice: Replace default_init() with post_bfpt() for gd25q256.
* Micron - ST: Enable locking for mt25qu256a.
* Winbond: Add support for W25Q512NW-IQ.
* ISSI: Use PARSE_SFDP and SPI_NOR_QUAD_PP.

Fix merge conflict in the jedec,spi-nor bindings.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2022-12-05 15:40:59 +01:00

97 lines
3.1 KiB
YAML

# SPDX-License-Identifier: GPL-2.0-only
%YAML 1.2
---
$id: http://devicetree.org/schemas/mtd/jedec,spi-nor.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: SPI NOR flash ST M25Pxx (and similar) serial flash chips
maintainers:
- Rob Herring <robh@kernel.org>
allOf:
- $ref: "mtd.yaml#"
- $ref: /schemas/spi/spi-peripheral-props.yaml#
properties:
compatible:
oneOf:
- items:
- pattern: "^((((micron|spansion|st),)?\
(m25p(40|80|16|32|64|128)|\
n25q(32b|064|128a11|128a13|256a|512a|164k)))|\
atmel,at25df(321a|641|081a)|\
everspin,mr25h(10|40|128|256)|\
(mxicy|macronix),mx25l(4005a|1606e|6405d|8005|12805d|25635e)|\
(mxicy|macronix),mx25u(4033|4035)|\
(spansion,)?s25fl(128s|256s1|512s|008k|064k|164k)|\
(sst|microchip),sst25vf(016b|032b|040b)|\
(sst,)?sst26wf016b|\
(sst,)?sst25wf(040b|080)|\
winbond,w25x(80|32)|\
(winbond,)?w25q(16|32(w|dw)?|64(dw)?|80bl|128(fw)?|256))$"
- const: jedec,spi-nor
- items:
- enum:
- issi,is25lp016d
- micron,mt25qu02g
- mxicy,mx25r1635f
- mxicy,mx25u6435f
- mxicy,mx25v8035f
- spansion,s25sl12801
- spansion,s25fs512s
- const: jedec,spi-nor
- const: jedec,spi-nor
description:
Must also include "jedec,spi-nor" for any SPI NOR flash that can be
identified by the JEDEC READ ID opcode (0x9F).
reg:
minItems: 1
maxItems: 2
m25p,fast-read:
type: boolean
description:
Use the "fast read" opcode to read data from the chip instead of the usual
"read" opcode. This opcode is not supported by all chips and support for
it can not be detected at runtime. Refer to your chips' datasheet to check
if this is supported by your chip.
broken-flash-reset:
type: boolean
description:
Some flash devices utilize stateful addressing modes (e.g., for 32-bit
addressing) which need to be managed carefully by a system. Because these
sorts of flash don't have a standardized software reset command, and
because some systems don't toggle the flash RESET# pin upon system reset
(if the pin even exists at all), there are systems which cannot reboot
properly if the flash is left in the "wrong" state. This boolean flag can
be used on such systems, to denote the absence of a reliable reset
mechanism.
reset-gpios:
description:
A GPIO line connected to the RESET (active low) signal of the device.
If "broken-flash-reset" is present then having this property does not
make any difference.
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
flash@0 {
compatible = "spansion,m25p80", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
m25p,fast-read;
reset-gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
};
};
...