1a67a168f5
Both HDCP_{1.x,2.x} requires to select/deselect Multistream HDCP bit
in TRANS_DDI_FUNC_CTL in order to enable/disable stream HDCP
encryption over DP MST Transport Link.
HDCP 1.4 stream encryption requires to validate the stream encryption
status in HDCP_STATUS_{TRANSCODER,PORT} register driving that link
in order to enable/disable the stream encryption.
Both of above requirement are same for all Gen with respect to
B.Spec Documentation.
v2:
- Cosmetic changes function name, error msg print and
stream typo fixes. [Uma]
v3:
- uniformity for connector detail in DMESG. [Ram]
Cc: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
Tested-by: Karthik B S <karthik.b.s@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210111081120.28417-8-anshuman.gupta@intel.com
59 lines
2.4 KiB
C
59 lines
2.4 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_DDI_H__
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#define __INTEL_DDI_H__
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#include "intel_display.h"
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#include "i915_reg.h"
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struct drm_connector_state;
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struct drm_i915_private;
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struct intel_connector;
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struct intel_crtc;
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struct intel_crtc_state;
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struct intel_dp;
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struct intel_dpll_hw_state;
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struct intel_encoder;
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enum transcoder;
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i915_reg_t dp_tp_ctl_reg(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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i915_reg_t dp_tp_status_reg(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_ddi_fdi_post_disable(struct intel_atomic_state *state,
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struct intel_encoder *intel_encoder,
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const struct intel_crtc_state *old_crtc_state,
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const struct drm_connector_state *old_conn_state);
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void hsw_fdi_link_train(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port);
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bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);
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void intel_ddi_enable_transcoder_func(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);
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void intel_ddi_enable_pipe_clock(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_ddi_disable_pipe_clock(const struct intel_crtc_state *crtc_state);
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void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state);
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bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
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void intel_ddi_get_config(struct intel_encoder *encoder,
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struct intel_crtc_state *pipe_config);
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void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state,
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bool state);
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void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,
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struct intel_crtc_state *crtc_state);
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u32 bxt_signal_levels(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state);
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u32 ddi_signal_levels(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state);
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int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
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enum transcoder cpu_transcoder,
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bool enable, u32 hdcp_mask);
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void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
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#endif /* __INTEL_DDI_H__ */
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