6f3a81b600
Once init section is freed, attempting to patch init code
ends up in the weed.
Commit 51c3c62b58b3 ("powerpc: Avoid code patching freed init sections")
protected patch_instruction() against that, but it is the responsibility
of the caller to ensure that the patched memory is valid.
All callers have now been verified and fixed so the check
can be removed.
This improves ftrace activation by about 2% on 8xx.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/504310828f473d424e2ed229eff57bf075f52796.1669969781.git.christophe.leroy@csgroup.eu
238 lines
6.5 KiB
C
238 lines
6.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef _ASM_POWERPC_CODE_PATCHING_H
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#define _ASM_POWERPC_CODE_PATCHING_H
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/*
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* Copyright 2008, Michael Ellerman, IBM Corporation.
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*/
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#include <asm/types.h>
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#include <asm/ppc-opcode.h>
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#include <linux/string.h>
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#include <linux/kallsyms.h>
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#include <asm/asm-compat.h>
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#include <asm/inst.h>
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/* Flags for create_branch:
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* "b" == create_branch(addr, target, 0);
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* "ba" == create_branch(addr, target, BRANCH_ABSOLUTE);
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* "bl" == create_branch(addr, target, BRANCH_SET_LINK);
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* "bla" == create_branch(addr, target, BRANCH_ABSOLUTE | BRANCH_SET_LINK);
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*/
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#define BRANCH_SET_LINK 0x1
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#define BRANCH_ABSOLUTE 0x2
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/*
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* Powerpc branch instruction is :
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*
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* 0 6 30 31
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* +---------+----------------+---+---+
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* | opcode | LI |AA |LK |
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* +---------+----------------+---+---+
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* Where AA = 0 and LK = 0
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*
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* LI is a signed 24 bits integer. The real branch offset is computed
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* by: imm32 = SignExtend(LI:'0b00', 32);
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*
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* So the maximum forward branch should be:
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* (0x007fffff << 2) = 0x01fffffc = 0x1fffffc
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* The maximum backward branch should be:
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* (0xff800000 << 2) = 0xfe000000 = -0x2000000
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*/
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static inline bool is_offset_in_branch_range(long offset)
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{
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return (offset >= -0x2000000 && offset <= 0x1fffffc && !(offset & 0x3));
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}
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static inline bool is_offset_in_cond_branch_range(long offset)
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{
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return offset >= -0x8000 && offset <= 0x7fff && !(offset & 0x3);
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}
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static inline int create_branch(ppc_inst_t *instr, const u32 *addr,
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unsigned long target, int flags)
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{
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long offset;
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*instr = ppc_inst(0);
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offset = target;
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if (! (flags & BRANCH_ABSOLUTE))
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offset = offset - (unsigned long)addr;
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/* Check we can represent the target in the instruction format */
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if (!is_offset_in_branch_range(offset))
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return 1;
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/* Mask out the flags and target, so they don't step on each other. */
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*instr = ppc_inst(0x48000000 | (flags & 0x3) | (offset & 0x03FFFFFC));
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return 0;
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}
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int create_cond_branch(ppc_inst_t *instr, const u32 *addr,
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unsigned long target, int flags);
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int patch_branch(u32 *addr, unsigned long target, int flags);
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int patch_instruction(u32 *addr, ppc_inst_t instr);
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int raw_patch_instruction(u32 *addr, ppc_inst_t instr);
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static inline unsigned long patch_site_addr(s32 *site)
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{
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return (unsigned long)site + *site;
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}
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static inline int patch_instruction_site(s32 *site, ppc_inst_t instr)
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{
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return patch_instruction((u32 *)patch_site_addr(site), instr);
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}
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static inline int patch_branch_site(s32 *site, unsigned long target, int flags)
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{
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return patch_branch((u32 *)patch_site_addr(site), target, flags);
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}
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static inline int modify_instruction(unsigned int *addr, unsigned int clr,
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unsigned int set)
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{
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return patch_instruction(addr, ppc_inst((*addr & ~clr) | set));
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}
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static inline int modify_instruction_site(s32 *site, unsigned int clr, unsigned int set)
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{
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return modify_instruction((unsigned int *)patch_site_addr(site), clr, set);
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}
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static inline unsigned int branch_opcode(ppc_inst_t instr)
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{
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return ppc_inst_primary_opcode(instr) & 0x3F;
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}
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static inline int instr_is_branch_iform(ppc_inst_t instr)
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{
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return branch_opcode(instr) == 18;
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}
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static inline int instr_is_branch_bform(ppc_inst_t instr)
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{
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return branch_opcode(instr) == 16;
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}
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int instr_is_relative_branch(ppc_inst_t instr);
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int instr_is_relative_link_branch(ppc_inst_t instr);
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unsigned long branch_target(const u32 *instr);
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int translate_branch(ppc_inst_t *instr, const u32 *dest, const u32 *src);
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bool is_conditional_branch(ppc_inst_t instr);
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#define OP_RT_RA_MASK 0xffff0000UL
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#define LIS_R2 (PPC_RAW_LIS(_R2, 0))
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#define ADDIS_R2_R12 (PPC_RAW_ADDIS(_R2, _R12, 0))
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#define ADDI_R2_R2 (PPC_RAW_ADDI(_R2, _R2, 0))
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static inline unsigned long ppc_function_entry(void *func)
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{
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#ifdef CONFIG_PPC64_ELF_ABI_V2
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u32 *insn = func;
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/*
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* A PPC64 ABIv2 function may have a local and a global entry
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* point. We need to use the local entry point when patching
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* functions, so identify and step over the global entry point
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* sequence.
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*
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* The global entry point sequence is always of the form:
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*
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* addis r2,r12,XXXX
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* addi r2,r2,XXXX
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*
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* A linker optimisation may convert the addis to lis:
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*
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* lis r2,XXXX
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* addi r2,r2,XXXX
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*/
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if ((((*insn & OP_RT_RA_MASK) == ADDIS_R2_R12) ||
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((*insn & OP_RT_RA_MASK) == LIS_R2)) &&
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((*(insn+1) & OP_RT_RA_MASK) == ADDI_R2_R2))
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return (unsigned long)(insn + 2);
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else
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return (unsigned long)func;
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#elif defined(CONFIG_PPC64_ELF_ABI_V1)
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/*
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* On PPC64 ABIv1 the function pointer actually points to the
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* function's descriptor. The first entry in the descriptor is the
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* address of the function text.
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*/
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return ((struct func_desc *)func)->addr;
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#else
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return (unsigned long)func;
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#endif
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}
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static inline unsigned long ppc_global_function_entry(void *func)
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{
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#ifdef CONFIG_PPC64_ELF_ABI_V2
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/* PPC64 ABIv2 the global entry point is at the address */
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return (unsigned long)func;
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#else
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/* All other cases there is no change vs ppc_function_entry() */
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return ppc_function_entry(func);
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#endif
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}
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/*
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* Wrapper around kallsyms_lookup() to return function entry address:
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* - For ABIv1, we lookup the dot variant.
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* - For ABIv2, we return the local entry point.
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*/
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static inline unsigned long ppc_kallsyms_lookup_name(const char *name)
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{
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unsigned long addr;
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#ifdef CONFIG_PPC64_ELF_ABI_V1
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/* check for dot variant */
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char dot_name[1 + KSYM_NAME_LEN];
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bool dot_appended = false;
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if (strnlen(name, KSYM_NAME_LEN) >= KSYM_NAME_LEN)
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return 0;
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if (name[0] != '.') {
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dot_name[0] = '.';
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dot_name[1] = '\0';
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strlcat(dot_name, name, sizeof(dot_name));
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dot_appended = true;
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} else {
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dot_name[0] = '\0';
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strlcat(dot_name, name, sizeof(dot_name));
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}
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addr = kallsyms_lookup_name(dot_name);
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if (!addr && dot_appended)
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/* Let's try the original non-dot symbol lookup */
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addr = kallsyms_lookup_name(name);
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#elif defined(CONFIG_PPC64_ELF_ABI_V2)
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addr = kallsyms_lookup_name(name);
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if (addr)
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addr = ppc_function_entry((void *)addr);
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#else
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addr = kallsyms_lookup_name(name);
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#endif
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return addr;
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}
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/*
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* Some instruction encodings commonly used in dynamic ftracing
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* and function live patching.
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*/
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/* This must match the definition of STK_GOT in <asm/ppc_asm.h> */
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#ifdef CONFIG_PPC64_ELF_ABI_V2
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#define R2_STACK_OFFSET 24
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#else
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#define R2_STACK_OFFSET 40
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#endif
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#define PPC_INST_LD_TOC PPC_RAW_LD(_R2, _R1, R2_STACK_OFFSET)
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/* usually preceded by a mflr r0 */
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#define PPC_INST_STD_LR PPC_RAW_STD(_R0, _R1, PPC_LR_STKOFF)
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#endif /* _ASM_POWERPC_CODE_PATCHING_H */
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