4d5a124935
Add description of the J25 and J27 UART headers of the Macchiatobin. They use uart peripherals that the CP0 (J25) and CP1 (J27) provide. Even though J25 and J27 are labeled as UART header, the pins on these headers can be muxed for other purposes. But the UART functionality is useful when the board is mounted in an ATX style enclosure, since the console UART is not accessible through the microUSB at CON9. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
340 lines
7.3 KiB
Plaintext
340 lines
7.3 KiB
Plaintext
/*
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* Copyright (C) 2016 Marvell Technology Group Ltd.
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPLv2 or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/*
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* Device Tree file for MACCHIATOBin Armada 8040 community board platform
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*/
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#include "armada-8040.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Marvell 8040 MACHIATOBin";
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compatible = "marvell,armada8040-mcbin", "marvell,armada8040",
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"marvell,armada-ap806-quad", "marvell,armada-ap806";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>;
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};
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aliases {
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ethernet0 = &cp0_eth0;
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ethernet1 = &cp1_eth0;
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ethernet2 = &cp1_eth1;
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};
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/* Regulator labels correspond with schematics */
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v_3_3: regulator-3-3v {
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compatible = "regulator-fixed";
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regulator-name = "v_3_3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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status = "okay";
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};
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v_vddo_h: regulator-1-8v {
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compatible = "regulator-fixed";
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regulator-name = "v_vddo_h";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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status = "okay";
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};
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v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&cp0_gpio2 15 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_xhci_vbus_pins>;
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regulator-name = "v_5v0_usb3_hst_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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status = "okay";
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};
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usb3h0_phy: usb3_phy0 {
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compatible = "usb-nop-xceiv";
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vcc-supply = <&v_5v0_usb3_hst_vbus>;
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};
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};
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&uart0 {
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status = "okay";
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pinctrl-0 = <&uart0_pins>;
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pinctrl-names = "default";
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};
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&ap_sdhci0 {
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bus-width = <8>;
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/*
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* Not stable in HS modes - phy needs "more calibration", so add
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* the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
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*/
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marvell,xenon-phy-slow-mode;
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no-1-8-v;
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no-sd;
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no-sdio;
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non-removable;
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status = "okay";
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vqmmc-supply = <&v_vddo_h>;
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};
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&cp0_i2c0 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_i2c0_pins>;
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status = "okay";
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};
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&cp0_i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_i2c1_pins>;
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status = "okay";
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i2c-switch@70 {
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compatible = "nxp,pca9548";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x70>;
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sfpp0_i2c: i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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};
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sfpp1_i2c: i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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};
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sfp_1g_i2c: i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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};
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};
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};
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/* J25 UART header */
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&cp0_uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_uart1_pins>;
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status = "okay";
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};
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&cp0_mdio {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_ge_mdio_pins>;
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status = "okay";
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ge_phy: ethernet-phy@0 {
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reg = <0>;
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};
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};
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&cp0_pcie0 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_pcie_pins>;
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num-lanes = <4>;
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num-viewport = <8>;
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reset-gpio = <&cp0_gpio1 20 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&cp0_pinctrl {
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cp0_ge_mdio_pins: ge-mdio-pins {
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marvell,pins = "mpp32", "mpp34";
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marvell,function = "ge";
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};
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cp0_i2c1_pins: i2c1-pins {
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marvell,pins = "mpp35", "mpp36";
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marvell,function = "i2c1";
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};
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cp0_i2c0_pins: i2c0-pins {
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marvell,pins = "mpp37", "mpp38";
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marvell,function = "i2c0";
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};
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cp0_uart1_pins: uart1-pins {
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marvell,pins = "mpp40", "mpp41";
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marvell,function = "uart1";
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};
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cp0_xhci_vbus_pins: xhci0-vbus-pins {
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marvell,pins = "mpp47";
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marvell,function = "gpio";
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};
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cp0_pcie_pins: pcie-pins {
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marvell,pins = "mpp52";
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marvell,function = "gpio";
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};
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cp0_sdhci_pins: sdhci-pins {
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marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59",
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"mpp60", "mpp61";
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marvell,function = "sdio";
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};
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};
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&cp0_xmdio {
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status = "okay";
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phy0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <0>;
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};
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phy8: ethernet-phy@8 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <8>;
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};
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};
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&cp0_ethernet {
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status = "okay";
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};
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&cp0_eth0 {
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status = "okay";
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/* Network PHY */
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phy = <&phy0>;
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phy-mode = "10gbase-kr";
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/* Generic PHY, providing serdes lanes */
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phys = <&cp0_comphy4 0>;
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};
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&cp0_sata0 {
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/* CPM Lane 0 - U29 */
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status = "okay";
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};
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&cp0_sdhci0 {
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/* U6 */
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broken-cd;
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bus-width = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_sdhci_pins>;
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status = "okay";
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vqmmc-supply = <&v_3_3>;
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};
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&cp0_usb3_0 {
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/* J38? - USB2.0 only */
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status = "okay";
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};
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&cp0_usb3_1 {
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/* J38? - USB2.0 only */
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status = "okay";
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};
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&cp1_ethernet {
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status = "okay";
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};
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&cp1_eth0 {
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status = "okay";
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/* Network PHY */
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phy = <&phy8>;
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phy-mode = "10gbase-kr";
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/* Generic PHY, providing serdes lanes */
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phys = <&cp1_comphy4 0>;
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};
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&cp1_eth1 {
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/* CPS Lane 0 - J5 (Gigabit RJ45) */
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status = "okay";
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/* Network PHY */
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phy = <&ge_phy>;
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phy-mode = "sgmii";
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/* Generic PHY, providing serdes lanes */
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phys = <&cp1_comphy0 1>;
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};
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&cp1_pinctrl {
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cp1_spi1_pins: spi1-pins {
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marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16";
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marvell,function = "spi1";
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};
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cp1_uart0_pins: uart0-pins {
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marvell,pins = "mpp6", "mpp7";
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marvell,function = "uart0";
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};
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};
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/* J27 UART header */
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&cp1_uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp1_uart0_pins>;
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status = "okay";
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};
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&cp1_sata0 {
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/* CPS Lane 1 - U32 */
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/* CPS Lane 3 - U31 */
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status = "okay";
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};
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&cp1_spi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp1_spi1_pins>;
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status = "okay";
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spi-flash@0 {
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compatible = "st,w25q32";
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spi-max-frequency = <50000000>;
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reg = <0>;
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};
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};
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&cp1_usb3_0 {
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/* CPS Lane 2 - CON7 */
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usb-phy = <&usb3h0_phy>;
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status = "okay";
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};
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