Ralf Baechle f4cdb6a00c MIPS: SEAD3: Enable LL/SC. ...

All synthesizable CPU cores that could be loaded into a SEAD3's FPGA are
MIPS32 or MIPS64 CPUs that have ll/sc.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

2013-03-12 18:58:09 +01:00

..

cpu-feature-overrides.h

MIPS: SEAD3: Enable LL/SC.

2013-03-12 18:58:09 +01:00

irq.h

MIPS: Whitespace cleanup.

2013-02-01 10:00:22 +01:00

kernel-entry-init.h

…

war.h

MIPS: PMC-Sierra Yosemite: Remove support.

2012-12-13 18:15:30 +01:00