ee664a9252
This converts SPARC to use asm-generic/pci-dma-compat instead of the homegrown mechnism. SPARC32 has two dma_map_ops structures for pci and sbus (removing arch/sparc/kernel/dma.c, PCI and SBUS DMA accessor). The global 'dma_ops' is set to sbus_dma_ops and get_dma_ops() returns pci32_dma_ops for pci devices so we can use the appropriate dma mapping operations. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-8-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
121 lines
3.2 KiB
C
121 lines
3.2 KiB
C
#ifndef __SPARC64_PCI_H
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#define __SPARC64_PCI_H
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#ifdef __KERNEL__
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#include <linux/dma-mapping.h>
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/* Can be used to override the logic in pci_scan_bus for skipping
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* already-configured bus numbers - to be used for buggy BIOSes
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* or architectures with incomplete PCI setup by the loader.
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*/
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#define pcibios_assign_all_busses() 0
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#define pcibios_scan_all_fns(a, b) 0
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#define PCIBIOS_MIN_IO 0UL
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#define PCIBIOS_MIN_MEM 0UL
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#define PCI_IRQ_NONE 0xffffffff
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#define PCI_CACHE_LINE_BYTES 64
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static inline void pcibios_set_master(struct pci_dev *dev)
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{
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/* No special bus mastering setup handling */
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}
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static inline void pcibios_penalize_isa_irq(int irq, int active)
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{
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/* We don't do dynamic PCI IRQ allocation */
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}
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/* The PCI address space does not equal the physical memory
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* address space. The networking and block device layers use
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* this boolean for bounce buffer decisions.
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*/
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#define PCI_DMA_BUS_IS_PHYS (0)
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/* pci_unmap_{single,page} is not a nop, thus... */
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#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
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dma_addr_t ADDR_NAME;
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#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
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__u32 LEN_NAME;
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#define pci_unmap_addr(PTR, ADDR_NAME) \
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((PTR)->ADDR_NAME)
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#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
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(((PTR)->ADDR_NAME) = (VAL))
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#define pci_unmap_len(PTR, LEN_NAME) \
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((PTR)->LEN_NAME)
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#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
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(((PTR)->LEN_NAME) = (VAL))
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/* PCI IOMMU mapping bypass support. */
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/* PCI 64-bit addressing works for all slots on all controller
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* types on sparc64. However, it requires that the device
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* can drive enough of the 64 bits.
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*/
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#define PCI64_REQUIRED_MASK (~(dma64_addr_t)0)
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#define PCI64_ADDR_BASE 0xfffc000000000000UL
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#ifdef CONFIG_PCI
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static inline void pci_dma_burst_advice(struct pci_dev *pdev,
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enum pci_dma_burst_strategy *strat,
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unsigned long *strategy_parameter)
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{
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unsigned long cacheline_size;
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u8 byte;
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pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
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if (byte == 0)
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cacheline_size = 1024;
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else
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cacheline_size = (int) byte * 4;
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*strat = PCI_DMA_BURST_BOUNDARY;
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*strategy_parameter = cacheline_size;
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}
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#endif
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/* Return the index of the PCI controller for device PDEV. */
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extern int pci_domain_nr(struct pci_bus *bus);
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static inline int pci_proc_domain(struct pci_bus *bus)
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{
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return 1;
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}
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/* Platform support for /proc/bus/pci/X/Y mmap()s. */
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#define HAVE_PCI_MMAP
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#define HAVE_ARCH_PCI_GET_UNMAPPED_AREA
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#define get_pci_unmapped_area get_fb_unmapped_area
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extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state,
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int write_combine);
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extern void
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pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
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struct resource *res);
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extern void
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pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
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struct pci_bus_region *region);
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static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
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{
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return PCI_IRQ_NONE;
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}
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struct device_node;
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extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev);
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#define HAVE_ARCH_PCI_RESOURCE_TO_USER
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extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
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const struct resource *rsrc,
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resource_size_t *start, resource_size_t *end);
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#endif /* __KERNEL__ */
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#endif /* __SPARC64_PCI_H */
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